輸入緩沖器 的英文怎麼說

中文拼音 [shūrùhuǎnchōngqì]
輸入緩沖器 英文
i ut buffer
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 入 : Ⅰ動詞1 （進來或進去） enter 2 （參加） join; be admitted into; become a member of 3 （合乎） conf...
  • 緩 : Ⅰ形容詞1 （遲; 慢） slow; unhurried 2 （緩和; 不緊張） not tense; relaxed Ⅱ動詞1 （延緩; 推遲） d...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 輸入 : 1 （從外部送到內部） import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. If the node is at, or near to, ground then a grounded guard ring will be appropriate, if it is at some other potential it may be necessary to use a high input impedance buffer amplifier, with its input connected to the node, to force the guard ring to the node potential

    如果被保護的節點的電位是（或接近）零電位，採用地線保護環最為合適；如果節點電位是其他值，那麼可以用高輸入阻抗放大器組成緩沖器，輸入端連接該節點，輸出端連接保護環。
  2. In the proposed method, the controller takes the buffer length as congestion indication, takes sources quality and bandwidth utility as object function so as to learn on line. as the controller outputs, the coding rate for input traffic sources and the corresponding user percentage are used to adjust the cells " arrival rate to the multiplexer buffer. compared with the previous method where cells " arrival rate is tuned only by the encoding rate and the encoding rates for all input traffic sources are regulated in a body, the proposed method guarantee that the quality of cells are optimal while cell loss rate is minimized, which means quality of service is guaranteed

    在該方法中，擁塞控制器以緩沖區大小信元作為擁塞指示，以信源質量和帶寬利用率作為目標函數進行在線學習，控制器輸出包括信源編碼率及其對應的用戶數在全部用戶中所佔的百分比，即根據信源編碼率及對應的用戶百分數調整信源輸入流，從而克服了以往擁塞控制方法中僅僅調整編碼率帶來的對所有信源進行整體調整的缺陷，使控制系統在信元損失率最小情況下確保信源輸入流質量最高，從而有效地利用了網路帶寬。
  3. We use a colorful noise to describe traffic flow and regard it as the uncontrolled input ( equaled to noise ). then we use the multi - rate sampling pi controller to eliminate the error caused by noise, and make the length of queue stabilize at the threshold. the availability of the strategies and stability of systems are proved by doing some analysis and simulation

    文中我們將一有色噪聲看作不可控輸入的擾動，採用基於pi的多采樣速率控制器以消除由此不可控輸入所造成的對系統輸出（交換節點緩沖區隊列長度）誤差的影響，使得系統輸出（隊列長度）穩定在閾值附近。
  4. It eliminates the need for agent blocks to have specific knowledge of ram array behind it. it takes care of protocols and latencies in an effort to simplify memory access by the agent blocks. agent blocks " see " a single linear frame buffer, all paging and bank swapping is handled by the and is transparent to the agent blocks

    在嵌入式系統晶元中高速存儲器介面控制電路是系統必不可少的重要組成部分，由於有了存儲器介面的存在，使得系統內部客戶模塊不必專門了解存儲器本身的復雜特性，而只需關心傳輸協議和一些定義的遲滯參數，在客戶看來存儲器僅僅是一個線性的幀緩沖器，所有的換頁、區段切換都交由介面電路來處理，從而大大簡化了客戶對存儲器操作的復雜度。
  5. Become a kind of new electronics circuit - current - mode circuit. it is replacing the traditional design method of the voltage - mode in the high frequency high - speed signal processing realm 。 this thesis mainly discussed the modified second - generation current conveyors based on the current - mode kinds of new cuicuit components, they are stronger modified standard current - mode parts in fuctions on this foundation. mainly including the modified differential difference current conveyor ( mddccii ) 、 the fully balanced second generation current conveyor ( fbccii ) 、 ( full balances ) four - terminal floating nullor ( fbftfn ) and the current differencing buffered amplifier ( cdba ), they are all function very strong standard current - mode parts, they all can provide some circuit functions of better than general operation amplifier, because they have the voltage importation and the current importation, therefore use it since can carry out the voltage - mode signal processing circuit expediently, can also carry out the current - mode signal processing circuit expediently, and have to increase the benefit bandwidth to accumulate more widely than the voltage - mode, but have their advantages more according to the current - mode filter of the modified current conveyor, because it constitutes in brief, the filter wave function is stronger and they are better than in general use operation amplifier of many advantages, be easy to composing for example 、 high speed 、 frequency bandwidth 、 the power supply voltage requests low 、 consume small, the impedance is different from etc. advantages, otherwise they have biggish dynamic range, and flexible circuit synthesize, so they are the best active parts

    從第二代電流傳輸器ccii入手，重點研究了以下幾種改進型的第二代電流傳輸器:改進的差動差分電流傳輸器mddccii 、全平衡第二代電流傳輸器fbccii 、多輸出四端浮地零器ftfn 、全平衡四端浮地零器fbftfn 、電流差分緩沖放大器cdba的電路結構及其模型。然後在此基礎上系統地研究了基於這幾種改進型的第二代電流傳輸器的濾波器的設計方法，主要方法和結果如下:利用mddccii設計了差分式連續時間電流模式低通、帶通濾波器;電流模式跳耦結構考爾低通濾波器;利用fbccii設計了帶通二階節濾波器及電流模式雙二階通用濾波器;設計了基於多輸出端ftfn的電流模式二階通用濾波器電路;通過數字化開關選擇的基於fbftfn的電流模式通用濾波器;設計了基於最少個數電流緩沖放大器（兩個cdba ）的多功能通用電流模式濾波器及其在非理想因素情況下分析。設計濾波器的主要方法是採用級聯設計、運算模擬（信號流圖法）和反饋設計（跳耦法） 。
  6. Ibis 3. 2 electronic design automation libraries - part 1 : input output buffer information specifications ibis version 3. 2

    電子設計自動化程序庫.第1部分:輸入輸出緩沖器信息規范
  7. With regard to the flow regulation of the best - effort traffic, the controllable traffic in high speed computer communication networks, the present paper proposes a novel control theoretic approach that designs a proportional - integrative ( pi ) controller based on multi - rate sampling for congestion controlling. based on the traffic model of a single node and on system stability criterion, it is shown that this pi controller can regulate the source rate on the basis of the knowledge of buffer occupancy of the destination node in such a manner that the congestion - controlled network is asymptotically stable without oscillation in terms of the buffer occupancy of the destionation node ; and the steady value of queue length is consistent with the specified threshold value

    本文從控制理論的角度出發，針對計算機高速網際網路中最大服務交通流即能控交通流的調節問題提出了一種基於多速率采樣的具有比例積分（ pi ）控制器結構的擁塞控制理論和方法，在單個節點的交通流的模型基礎上，運用控制理論中的系統穩定性分析方法，討論如何利用信終端節點緩沖佔有量的比例加積分的反饋形式來調節信源節點的能控交通流的輸入速率，從而使被控網路節點的緩沖佔有量趨于穩定;同時使被控網路節點的穩定隊列長度逼近指定的門限值。
  8. Applies the vertex processing defined by the vertex shader to the set of input data streams, generating a single stream of interleaved vertex data to the destination vertex buffer

    將頂點著色器定義的頂點處理過程應用到輸入數據流組，從而生成從插入的頂點數據到目標頂點緩沖區的單個流。
  9. A record operation that writes all i / o buffers to a file if they haven ' t already been written

    將所有輸入輸出緩沖器的內容寫入一個文件中的一種記錄操作。
  10. Batch input spooler

    整批輸入緩沖器
  11. In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter

    在電路模塊分析中，重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等，並且給出了在硬體電路設計和調試過程中的問題與解決辦法。
  12. Input output buffer information

    出入輸出緩沖器資訊規格
  13. Input buffer available enabling simultaneous printing and data receiving

    約20kb輸入緩沖器供同時接收與列印之應用
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