輸出級 的英文怎麼說

中文拼音 [shūchūjí]
輸出級 英文
output cascade
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 級 : Ⅰ名詞1 （等級） level; rank; grade 2 （年級） any of the yearly divisions of a school course; gra...
  • 輸出 : 1 （從內部送到外部） export 2 [電學] output; outcome; outlet; out fan; fanout; 輸出變壓器 output ...
  1. When analysing output stage, i try using the miler theorem to analyse it, so quantitative analysis can be deduced and understood easily

    在分析輸出級時，嘗試了用密勒定理分析，這樣，定量的分析容易推導、理解。
  2. Audio output level is adjusted by digital push buttons

    音頻輸出級別調整數碼按鈕。
  3. The design and analysis of vertical pnp transistor was accomplished through the relationship between carriers lifetime of epitaxy layer and current gain, rate of surface combination and leakage current, carriers lifetime of epitaxy layer and switch speed

    從外延層載流子壽命與晶體管放大倍數，表面復合率與漏電流，以及外延層載流子壽命與晶體管開關速度等方面對于輸出級縱向pnp管進行了較為詳細的設計與分析，達到了電路中對輸出級縱向pnp管主要參數指標的要求。
  4. 3. the output stage of transimpedance amplifier is realized with rail - to - rail topology to meet the requirement of output swing of the instrumentation amplifier

    3 .針對儀表放大器的輸出擺幅的要求，在跨阻放大器的輸出級採用rail - to - rail結構來實現。
  5. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究，分析了這些技術的工作原理和優缺點，在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時，為了使輸入共模電壓范圍達到軌至軌，不是採用傳統的差動輸入結構，而是採用了nmos管和pmos管並聯的互補差動輸入對結構，並採用成比例的電流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中，電流鏡負載並不是採用傳統的標準共源共柵結構，而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設計時，為了提高效率，採用了推挽共源級放大器作為輸出級，輸出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計，採用了帶電流鏡負載的差分放大器設計了一個基準電流源，給運放提供穩定的偏置電流和偏置電壓，保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  6. The main work has been finished in paper is below : 1. all kinds of structure of low - voltage op - amp were compared and analyzed, such as the three - times current, redundant difference pair, dc level shifter input stage, large current output, very low - voltage output stage. 2

    對國內外的相關研究動態做了廣泛的調研，仔細比較了各種實現電路的優缺點，如輸入級的三倍電流鏡法、冗餘差分對法、電平移位法等，輸出級的大擺幅輸出級、超低電壓輸出級等。
  7. Third, rail - to - rail amplifier output stages exhibit load - dependent gain which affects amplifier open - loop gain, and hence closed - loop gain accuracy

    第三，軌到軌放大器輸出級增益與負載有關，這將影響放大器的開環增益，當然也影響了閉環增益的準確性。
  8. In the output stage of the converter, a small filter is treated as an integral part of the dc - to - dc converter

    在變流器的輸出級，一個小的濾波器作為直流-直流變流器整體的一部分。
  9. A push - pull output stage was used in the circuit to extend output voltage from rail to rail and a class ab biasing is used to improve the power efficiency of the circuit

    輸出級採用共源結構的互補推挽輸出結構，提高了輸出電壓的動態范圍。並使用甲乙類的輸出結構，提高了電路的功率效率。
  10. The drive stage is made up of cascode class - f topology. a “ big ” mosfet is used in the class - e output stage. the thesis did the simulation of the pa by ads with the tsmc 0. 18 m rf cmos model, and completed the layout of the pa

    本文設計了一種新穎的射頻cmos功率放大器，採用兩級差分結構，用f類共源共柵結構作為驅動級，輸出級採用大尺寸mos管的e類功率放大器。
  11. Their number and site can be changed very easily to meet the requirements on thyristors in the limiter

    根據固態限流器中的晶閘管的實際需要電源輸出級的路數和安裝位置可以很容易地改變。
  12. Specifically analysed and presented the common - mode differential input stage, linear transconductance control circuit of input stage, current sum circuit, floating ab - class control output stage, the bias circuit of op amps and the bandgap reference current source circuit

    具體對運放的共模差分輸入級、輸入級線性跨導控制電路、電流和電路、浮動ab類輸出級電路、運放的偏置電路和帶隙參考電流源電路進行分析設計。
  13. In order to expand the signal the dynamirange, the low voltage operational amplifier usually needs the input signal scope and the output signal scope to be able to achieve the entire amplitude, in view of this question, this article discusses as follows : one is designed with ab rail - to - rail output stage

    為了擴大信號的動態范圍，低電壓運放通常需要輸入輸出的信號范圍能達到全擺幅。針對這個問題，本文做了如下工作: 1 ）設計了一個是包含ab類軌對軌輸出級的低功耗運算放大器。
  14. The other is the design of amplifier with constant trans - conductance ( gm ) rail - to - rail input stage. when common mode input voltage changes, it provides nearly constant - gm independent of input transistor operating region ( strong, moderate or weak inversion ), and the quiet nods of the circuit for current addition and the output stage keep unchanged

    當輸入共模電壓變化時，不管它的輸入mos差分對管處于強反型區還是弱反型區，輸入級的跨度保持不變，而且輸入級後面的電流加法電路和輸出級的靜態工作點也不會隨之改變。
  15. At light loads, the architecture allows the chip to “ skip ” cycles to reduce power dissipation. in the circuit design, the basic principle and small signal model of the boost power stage are given at first, and then the stability and small signal model of the control loop are also analyzed, finally, the whole chip architecture and sub - block parameters are presented according to the application requirements

    在電路設計中，首先闡述了升壓型直流轉換器的功率輸出級的拓撲結構、基本原理、小信號模型，然後分析了電流模式控制迴路的穩定性及小信號模型，最後根據應用要求進行了電路的總體架構設計，完成了每個子電路的各種參數的分析、計算。
  16. This type of configuration requires a much higher power supply voltage, since the power supplied to the output stage is supplied through this load resistor

    這種結構需要一個很高地電源高壓，因為輸出級的高壓需要通過負載電阻。
  17. For analog multiplier, the basic principles were analyzed and input, output circuits were designed

    對于模擬乘法器，分析了其工作原理，並設計其輸入輸出級使其適合設計要求。
  18. At the input, output, and error output levels, you set the common properties of inputs, outputs, and the error output

    在輸入級、輸出級和錯誤輸出級，設置輸入、輸出和錯誤輸出的公用屬性。
  19. Data flow components can be configured at the component level ; at the input, output, and error output levels ; and at the column level

    數據流組件可在下列級別配置：組件級；輸入級、輸出級和錯誤輸出級；列級。
  20. To change the amount of information in the output, change the message output level try

    要更改輸出中的信息數量，請更改消息輸出級別（而不是嘗試更改
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