通信字處理器 的英文怎麼說

中文拼音 [tōngxìnchǔ]
通信字處理器 英文
cw communicating word processor
  • : 通量詞(用於動作)
  • : Ⅰ名詞1 (文字) character; word 2 (字音) pronunciation 3 (字體) form of a written or printed ...
  • : 處名詞1 (地方) place 2 (方面; 某一點) part; point 3 (機關或機關里一個部門) department; offi...
  • : Ⅰ名詞1 (物質組織的條紋) texture; grain (in wood skin etc ) 2 (道理;事理) reason; logic; tru...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 通信 : communication; communicate by letter; correspond
  1. Adsp sharc21060 is one of current digital signal processing boards based on super harvard architecture, and it " s architecture is designed to streamy parallel

    Adspsharc21060是一種基於超級哈佛結構的用數, sharc的結構被設計為流水線并行
  2. By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure. as followed, this paper depicted design details of intelligent instrument " s hardware, it included the design of interface circuit, data commutations and digital logic of dsp, mcu, internet ' s chip and isp ' s apparatus etc., and have designed schematic map and circuit. so it accomplished the full design of hardware / software of the new type intelligent instrument

    本文具體給出了新型智能儀硬體結構及實現,描述了智能儀硬體設計細節,包括數、單片機、 internet接入晶元、可編程數/模擬件等在新型智能儀中的介面電路設計、數據設計和數邏輯設計等,詳細地給出了設計原圖和電路圖;給出了新型智能儀的軟體設計細節,從而完成了新型智能儀完整的軟硬體設計。
  3. Currently, the hardware / software codesign of a 32bit mulitmedia dsp named md - 32 is under way in the institute of information & communication engineering of zhejiang university

    目前,浙江大學息與工程研究所正在進行32位多媒體數(命名為md - 32 )的軟硬體開發。
  4. The hardware in this system includes a digital signal processor, an analogy input channel, a lcd, an analogy output path, a keyboard input part, a guard circuit and a logic control circuit

    該系統硬體包括數晶元、前向輸入道、液晶顯示、模擬量輸出部分、鍵盤輸入部分、保護電路部分和邏輯控制部分。
  5. Different from general microprocessors, dsps have harvard architecture or enhanced harvard architecture and units of dsps can work in parallel. to perform multiplication in high speed, dsps also include hardware multiplier in its cpu

    用微不同,數採用了哈佛總線結構或改進哈佛總線結構,具有高度的并行性,為了快速完成乘法計算在cpu中增設了硬體乘法單元。
  6. But the traditional analog pfc has some insuperability shortcoming, with the development of the digital technique, more and more control algorithms canbe implemented in power electronics by the digital chips : microprocessors or digital signal processors ( dsp )

    因此功率因數校正技術( pfc )應運而生,成為電力電子技術領域一個新的研究熱點。然而傳統的模擬控制功率因數校正技術具有許多不可克服的缺點,如今隨著數控制技術的不斷發展,越來越多的控制策略過數( dsp )得以實現。
  7. The main controller is in charge of managing, communicating and the measuring of grating - displacement and angle - displacement. the subcontrollcr is in charge of the measuring of inner diameter of psd, the analog - to - digital converting of the serial a / d and the data processing of dsp

    主控制完成管及光柵位移、角位移測量控制功能;子控制完成psd內徑尺寸檢測、串列a / d模數轉換及數( dsp )數據功能。
  8. With the development of the digital technique, more and more control algorithms can be implemented in power electronics by the digital chips : microprocessors or digital signal processors ( dsp )

    隨著數控制技術的不斷發展,越來越多的控制策略過數( dsp )得以實現。
  9. Up to now, the technique of digital signal processing has become a new technique field and a independent subject. using special or general digital signal processor ( dsp ) to analyze, distill, transform signal in communication area has been rapidly developped and widely applied

    當今,數技術已經發展成為一門新的技術領域和獨立的學科體系,利用專用或用的數以數運算的方式對號進行分析、提取、變換等領域已經得到迅速的發展和廣泛的應用。
  10. Secondly, the scheme of the management machine of power communication, whose hardware architecture is based on c32 digital signal processor ( dsp ) and software is based on real time operation system ( rtos ), is discussed. and also the possibility of realization of the scheme is demonstrated

    然後,給出了電力自動化機的設計方案,介紹了論文所採用的硬體基於c32數( dsp )和軟體以實時操作系統( rots )為平臺的方案,並論證其可行性。
  11. Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail

    針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向,本論文重點做了以下幾個方面的工作,目的在於提高dtc系統的綜合性能: ( 1 )提出一種新型的速度磁鏈觀測,新型的速度磁鏈觀測採用自適應閉環磁鏈觀測代替傳統的積分從而提高磁鏈觀測的精度,並且根據popov超穩定性論推導出轉速的新型自適應收斂律; ( 2 )改善系統的低速運行性能,主要從提高低速時對定子磁鏈的估計精度入手,提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數; ( 3 )採用數dsp實現系統全數化硬體控制,結合ti公司生產的tms320lf2407晶元,設計了直接轉矩控制系統的實驗裝置; ( 4 )提出了基於sercos總線網路化分散式的直接轉矩控制系統, sercos ( serialrealtimecommunicationsystem )是目前最適合同步和協調控制的串列實時協議; ( 5 )基本勾勒出整個控制系統的硬體和軟體設計基本框架,詳細描述一些實驗中的具體的細節問題。
  12. In such situation, controlling of the transf - orming process and synchronizing of sampled data only could be achie - ved via hardware, and data must be stored ( by using high - speed stora - ge chip ) and digital signal must be processed ( by using high - speed d - sp ) in real time simultaneously

    在這種情況下,常只能用硬體實現轉換過程的控制和采樣數據的同步,仔細設計時序電路,同時必須採用高速存儲晶元對數據進行存儲和高速的數( dsp )完成數號的實時
  13. In this article, we compare scm with dsp in their architectures and operation speeds and design a motion controller based on the 16 - bit fixed - point digital signal processor tms320lf2407a, by which we realize the controls of eight axes of step - by - step motor or servo motor

    本文過比較單片機與dsp晶元的體系結構與運算速度,設計了一種基於ti公司的16位定點數tms320lf2407a的八軸步進/伺服運動控制,實現了對步進電機和伺服電機的運動控制。
  14. Each channel has independent synchronization and two powerful digital signal processing chips. one chip performs all the synchronization and sampling computations, while the other does the fast fourier transform of current and voltage signals sampled with 18 bit resolution. both current and voltage have separate but fully synchronized a d waveform capture sections

    號分析能力而言, 2503ah系列的最大特點是速度和精度,各道均獨立同步及擁有兩片數晶元,當一晶元執行全部同步與取樣運算時,另一晶元則為已取樣的電流與電壓號以真實18位解析度進行速傳立葉變換,電流與電壓具分離但完全同步的a d波形捕捉部份
  15. Secondly, basing on single channel if sr receiver mathematic model, this thesis has designed if sr receiver subsystem and brought forward its design project and system circuit principle diagram, and explained the system working principle. furthermore, this thesis introduces the working principles and respective applications of wideband high - speed adc ad6640, ddc ad6620 and high - speed dsp tms320c6713 according with the if sr receiver subsystem high - speed analog digital conversion department, digital down conversion department and high speed digital signal processing department. thirdly, the thesis emphatically demonstrates the software realization department of the if sr receiver subsystem, which including ad6620 ' s inner parameter software setup, tms320c6713 data transmission and processing and the quadrant demodulation algorithm program realization

    其次,基於單道中頻軟體無線電接收機數學模型,本文設計了中頻( if , intermediatefrequency )軟體無線電接收機子系統,給出了中頻軟體無線電接收機子系統的設計方案和系統電路原圖,說明了系統工作原,並分別對應系統中的高速模數轉換部分、數下變頻部分、基帶數碩士學位論文軟體無線電論研究及中頻軟體無線電接收機子系統設計部分,介紹了高速adcad664o ,數下變頻( ddc , digitaldownconverter ) ad6620 ,高速數( dsp , digitalsignalproeessor ) tms320c6713的工作原,以及它們在中頻軟體無線電接收機子系統中的應用。
  16. Hence, the requirements of the servo control card are getting much sophisticated. in this thesis, the research work and implementation details of a 6 axes servo control card are discussed. this card is based on the ti company ? dsp chip tms320f240 and has realized the following functions : a ) signal encoder, b ) position limit, c ) dual ram communication with cpu, d ) coordinated control e ) dia conversion

    該卡以ti公司的16位定點數tms320f240為核心晶元,實現6路編碼號輸入,軸限位中斷過雙埠ram與pc進行訊,接收pc發送過來的控制指令和數據,完成插補運算、聯動運算等控制,過d / a轉換電路,將結果轉化為模擬電壓送伺服放大驅動電機。
  17. Microcontrollers mcus and digital signal processors dsps are here to stay, and are becoming more pervasive in industrial, communications, automobile, and consumer products

    微控制mcu和數dsp在工業汽車和消費類產品中得到越廣泛的應用
  18. According to these problems, the paper bring out a new - type fault recorder scheme based on ethernet communication and dsp, this scheme adopts many advanced technologies and development flat roofs, such as gps, embedded microcomputer and dsp

    本文針對以上缺點,利用全球定位系統( gps ) 、嵌入式工控機、數等先進技術和開發平臺,提出了一種基於以太網訊和dsp的新型的故障錄波方案。
  19. A design ot portable digital oscillograph based on dsp is presented. a integrated prototype is composed of high speed data processing module by which signal is digitalized, data processing unit whose core is dsp, general controller as which cpld is used and terminal facility - - lcd

    過高速數據採集模塊將號數化,以高性能數tms320vc5402為核心構成數據單元,採用高密度的可編程邏輯件epf6016a設計儀的系統控制單元,使用液晶顯示做為終端顯示設備,構成一個完整的示波表樣機。
  20. In this article, two projects - " sqy - 15 encrypt subsystem of hospitalization insurance system " and " general image compress flatform " are combined to get a resolvent scheme to realize data encrypt and image compress based on digital signal processor ( dsp ) and application specific integrated circuits ( asic ). this article includes three key technologies in designing and realizing the data encrypt card and the image compress flatform. they are : ( 1 ) design of dsp application system ; ( 2 ) epld designing technology using vhdl language ; ( 3 ) pci interface technology

    本文結合「 sqy - 15醫療保險息系統加密子系統」和「用圖像壓縮平臺」兩項目,提出了基於數( dsp )和可編程專用集成電路( asic )實現數據加密卡和圖像壓縮平臺的解決方案,重點介紹了基於dsp的數據加解密卡和圖像壓縮平臺設計與實現中的三個關鍵技術: ( 1 ) dsp應用系統設計; ( 2 ) vhdl語言設計epld技術; ( 3 ) pci介面技術。
分享友人