通道總線輸入 的英文怎麼說

中文拼音 [tōngdàozǒngxiànshūrù]
通道總線輸入 英文
cbi channel bus in
  • 通 : 通量詞（用於動作）
  • 道 : Ⅰ名詞（道路） road; way; route; path 2 （水流通過的途徑） channel; course 3 （方向; 方法; 道理） ...
  • 總 : Ⅰ動詞（總括; 匯集） assemble; gather; put together; sum up Ⅱ形容詞1 （全部的; 全面的） general; o...
  • 線 : 名詞1 （用絲、棉、金屬等製成的細長的東西） thread; string; wire 2 [數學] （一個點任意移動所構成的...
  • 輸 : Ⅰ動詞1 （運輸; 運送） transport; convey 2 [書面語] （捐獻） contribute money; donate 3 （失敗） l...
  • 入 : Ⅰ動詞1 （進來或進去） enter 2 （參加） join; be admitted into; become a member of 3 （合乎） conf...
  • 通道 : thoroughfare; passageway; pass; enterclose; gallery; drong; tunnel; avenue; alure; way; row; key ...
  • 輸入 : 1 （從外部送到內部） import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  2. First the paper introduces the composition of vxi measurement system both hardware and software. second the paper introduces the amc2320 8 - channel parallel daq module, including hardware components, drive functions and means to develop application programs with them, the specifications such as precision

    本文介紹了vxi總線測試系統的軟硬體組成，簡要說明了amc2320八通道并行數據採集模塊的硬體組成和驅動函數，以及用戶如何利用廠家提供的驅動函數編寫自己的應用程序，重點是測試這個模塊的性能指標，包括精度、輸入信號的頻率范圍。
  3. The product has the following characters : all - purpose input, completed separated signal channels, collection of the signal data by scanning, the display technique of lcd big screen, flash memory ; capacious compatible floppy disk, 36 types of signals, multiple alarms, communication of rs232 / 485 and hart confered - link with a view to second generation technique of the field - bus. during the developing course, i used the method of reliability design to design hardware, and researched carefully the process of weak signal. pass to practice, the product has achieved all aim of the design

    系統在功能上實現了萬能輸入，信號通道之間的完全隔離，信號的掃描採集，大屏幕lcd顯示技術， flash存儲器進行數據存儲，大容量的具有兼容性的電子軟盤， 36種信號方式，多種報警方式， rs232 / 485通訊，以及著眼于下一代的現場總線技術的hart協議介面等。
  4. Ti ? the resistance measured across the channel drain and source ( or input and output ) of a bus - switch device

    測量總線開關器件指定通道的源漏極間（或輸入和輸出）所得到的阻抗。
  5. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上，通過對原模塊缺陷的分析，採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度，將原模塊中的所有數字電路全部集成在fpga晶元中，這樣不僅能節約成本，還能提高電路的可靠性和測量精度;採用高速的數字信號處理器（ dsp ）取代原有的單片機作為協處理器，來接收vxi發來的各種命令，分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號，能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平，該比較電平值能夠根據實際需求進行設置，能增強模塊的使用靈活性。
  6. As the manager of whole field bus net, the interface computer sets and controls all the i / o interface crates on the communication chain ; and i / o interface crates connect with control panel or other hardware devices using different function cards, dispersedly controlling each input and output channels of the interface system

    介面計算機作為整個現場總線網路的管理者，配置和管理通信鏈路中i o介面機箱運行； i o介面機箱則通過機箱內的不同功能的多個板卡，連接控制盤臺或其它硬體設備，分散控制介面系統的各個輸入輸出通道。
  7. The auto - test process could be done by several instructions " executed. results of the ip core ' s simulation shows the adc can achieve a 10 - bit resolution. system has 8 input channel and 5 sample period selection with the control of internal bus

    對該ip核的全局模擬結果表明，所設計的模數轉換器可以達到10位的精度，可以通過系統總線信號對8路信號輸入通道以及5種采樣速率進行選擇控制，可以通過系統指令完成模數轉換器的自測試功能。
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