運算處理器 的英文怎麼說

中文拼音 [yùnsuànchǔlǐqì]
運算處理器 英文
arithmetic proce or
  • 運 : Ⅰ動詞1 （物體位置不斷變化） move; revolve 2 （搬運; 運輸） carry; transport 3 （運用） use; wield...
  • 算 : Ⅰ動詞1 （計算數目） calculate; reckon; compute; figure 2 （計算進去） include; count 3 （謀劃;計...
  • 處 : 處名詞1 （地方） place 2 （方面; 某一點） part; point 3 （機關或機關里一個部門） department; offi...
  • 理 : Ⅰ名詞1 （物質組織的條紋） texture; grain （in wood skin etc ） 2 （道理;事理） reason; logic; tru...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 運算 : [數學] operation; arithmetic; operating
  1. The brains inside computers, called microprocessors, are measured in nanometres and their speed in the billionths of a second

    計算機的核心，被稱作微處理器，用納米來衡量技術水平，其運算速度達到一秒數十億次。
  2. Dsp chip is especially fit for digital signal processing, its main application is realizing all kinds of digital siginal processing arithmetics such as clove hitch 、 correlation 、 all kinds of transforms etc. realizing digital filters with dsp is an important application

    Dsp晶元是一種特別適合於進行數字信號處理運算的微處理器，其主要應用是實時快速的實現各種數字信號處理演算法，如卷積、相關以及各種變換等。其中，利用dsp來實現數字濾波器就是很重要的一種應用。
  3. The array ' s processor can create radio beams pointing in other directions as well by performing more complex mathematical operations on the signals from the two antennas

    陣列的處理器也可以對兩個天線的訊號進行更復雜的數學運算，以便針對其他方向產生無線電波束。
  4. The distributing design reduce effectively spending of cpu. through following experiments in practice, the outcome indicate that this nav system can accomplish the reckoning on data information of vehicle and has the supernal precision

    這樣有效的減少主處理器的開銷，集中進行卡爾曼濾波數據融合運算。測試結果表明該設計能夠實時完成對車輛的實時經緯度的測算，具有較高的精度。
  5. At present, the typic harmful current detection methods are the fast fourier transform algorithm in frequency domain and methods based on the instantaneous reactive power theory, these methods all require some transform and quick, real - time calculating, so high precision analog multipliers or high speed dsp chip with fast a / d are needed, this results in complex circuit and high cost ， which have restricted the development of apf

    目前畸變電流檢測常用的方法有頻域法的fft和基於瞬時無功理論的畸變電流檢測法。這些方法均有一定的變換，需要快速、實時運算，因此必須使用高速的數字微處理器和高性能a / d轉換器，這必將大大提高系統成本，使得電路結構復雜，在一定程度上限制了有源濾波器的發展。
  6. The key to the fft algorithm is the design of butterfly computation and that of the address logic. the whole schema is designed in the top - down design flow and described in the vhsic hardware description language ( vhdl ), basing on these, we do our research on reconfigurable technology. the result indicates that the data processing ability of reconfigurable system improved greatly

    結果表明，可重構系統在數據處理能力方面比以往的系統有了很大的提高，本設計實現的fft重構處理器可工作於60mhz下，完成一個16點fft需要132個主時鐘周期，完成32點fft需要324個主時鐘周期，而且具有一定可重構性，可以方便地將其運算點數進行擴展，或將其他的圖像處理演算法在實時處理系統中實現。
  7. By using a counter and an operation microprocessor, this paper analyses the measuring method and designs an instrument of edm sinking process in discharge state. this instrument takes samples of voltage, current signal and strong and weak of high frequency signals of detecting voltage amplitude, translates them into various time pulses in discharging state. and a counting unit turns these pulses into digital signals, then send them to a microprocessor. finally various discharge time percentages are sent to the control tache

    通過采樣電火花加工放電間隙的電壓、電流信號和檢測電壓幅值上的高頻信號的強弱，得出反映間隙放電狀態的各種時間脈沖，利用計數器分別對其計數，再送給單片機運算處理，輸出控制環節所需的各種放電狀態時間百分數。
  8. Abstract : by using a counter and an operation microprocessor, this paper analyses the measuring method and designs an instrument of edm sinking process in discharge state. this instrument takes samples of voltage, current signal and strong and weak of high frequency signals of detecting voltage amplitude, translates them into various time pulses in discharging state. and a counting unit turns these pulses into digital signals, then send them to a microprocessor. finally various discharge time percentages are sent to the control tache

    文摘:通過采樣電火花加工放電間隙的電壓、電流信號和檢測電壓幅值上的高頻信號的強弱，得出反映間隙放電狀態的各種時間脈沖，利用計數器分別對其計數，再送給單片機運算處理，輸出控制環節所需的各種放電狀態時間百分數。
  9. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  10. After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper

    此外，本文還對處理器的浮點運算單元設計做了初步的研究，以ansi ieee - 754浮點數二進制標準為參考，借鑒了經典的定點加法器和乘法器的設計，嘗試性的給出了浮點加法單元和乘法單元的實現模型和行為級上的硬體描述，並對其進行模擬和驗證。
  11. The video signal processing circuit realizes the primary catching, filtering and signal amplifying. variable threshold binarization processing circuit and two - channel counter are designed to sample to count the output pulse signal, which is processed, deposited and displayed in microprocessor. the communication interface circuit with the computer is also designed

    視頻信號處理電路完成了原始信號的初級捕捉、濾波、視頻放大等處理，設計了浮動閾值二值化處理電路，採用兩路計數器對輸出脈沖信號采樣計數，最後送入微處理器進行運算處理，可實現測量值的儲存、顯示等，並設計了與上位機的通訊介面。
  12. Plc controlled processor : high speed processing, accurate movements

    高效電腦控制處理器- - -電腦高速運算處理，動作明確流暢。
  13. The pressure sensor transforms the load weight into electric signal, which through cable transmitted into controller. then the electric signal is operated and disposed by controller box, and elevator load weighing is finished

    稱重傳感器將重量信號轉換成電信號經傳輸電纜送給控制儀部分，由控制儀部分進行運算處理，完成電梯稱重。
  14. Intelligent tri - phase ac current voltage instrument adopt advanced microprocessor carry out smart control and to inputed tri - phase ac current voltage signal carry out accurate measurement, after through cpu arithmetic processing it is displayed clearly and visually by the high brightness led digital tube, and have super - limit control alarm serial communication function etc

    智能三相交流電流電壓儀表採用先進的微處理器進行智能控制，對輸入的三相交流電流電壓信號進行精確的測量，經過cpu運算處理后，由高亮度led數碼管進行清晰直觀的顯示，並具有超限控制報警標準串列通訊等功能。
  15. Adopt advanced microprocessor carry out smart control and to inputed tri - phase ac current voltage signal carry out accurate measurement, after through cpu arithmetic processing it is displayed clearly and visually by the high brightness led digital tube, and have super - limit control alarm serial communication function etc

    採用先進的微處理器進行智能控制，對輸入的三相交流電流電壓信號進行精確的測量，經過cpu運算處理后，由高亮度led數碼管進行清晰直觀的顯示，並具有超限控制報警標準串列通訊等功能。
  16. Because they hold so much data, vector registers permit operations involving arrays to be performed very rapidly

    由於它們可以保存較多數據，向量寄存器對于涉及數組的運算處理得非常快。
  17. A programmable adjustor kmm and its application to rebuilding the boiler control system for small power plant are introduced in this paper

    摘要介紹了以小型電廠燃煤鍋爐控制系統改造為背景，利用kmm可編程調節器具有的豐富的控制、運算處理功能。
  18. The angle - encoder principle and design are introduced, mathematics - logical method of angle measurement circuit are introduced

    摘要文章簡要介紹了編碼器的工作原理，給出了角度測量電路的一種設計方式及信號的運算處理方法。
  19. Rapidly dynamic gps receiver needs a high - performance microprocessor because of continues tracks of several channels and then great real - time operation

    在高動態gps接收機中，由於要對多通道連續跟蹤，實時數據運算處理量大，因此對微處理器的性能要求較高。
  20. Intelligent ac power frequency cycle instrument adopt advanced microprocessor carry out smart control, to the simultaneous input ac voltage signal of power frequency carry out accurate measurement, after through cpu arithmetic processing, it to be display clearly and visually by the high brilliance led digital tube and can select serial communication function

    智能交流工頻周波儀表採用先進的微處理器進行智能控制，對同時輸入的交流電壓信號的工頻周波進行精確測量，經過cpu運算處理后，由高亮度led數碼管進行清晰直觀的顯示，並可選擇串列通訊功能。
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