選擇浮標器 的英文怎麼說
中文拼音 [xuǎnzháifúbiāoqì]
選擇浮標器
英文
selection floater- 選 : Ⅰ動詞1. (挑選) select; choose; pick 2. (選舉) elect Ⅱ名詞(挑選出來編在一起的作品) selections; anthology
- 擇 : 擇動詞(挑選) select; pick; choose
- 浮 : Ⅰ動詞1 (漂在液體表面) float; drift 2 [方言] (在水裡游) swim Ⅱ形容詞1 (在表面上的) superfici...
- 標 : Ⅰ名詞1 [書面語] (樹梢) treetop; the tip of a tree2 (枝節或表面) symptom; outside appearance; ...
- 器 : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
- 選擇 : select; choose; opt; election; choice; culling; alternative
- 浮標 : buoy; staff float; drogue; dobber; dan; buoyage; float rod; floating beacon; floating mark
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In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future
第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計,提出了適合硬體實現的浮點乘除法、加減運算的結構,浮點運算處理器主要用於高速fft浮點處理功能,異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計,在討論可測試性設計策略選擇的問題上,提出了針對不同模塊進行的分別測試策略,提出了層次化jtag測試方法和掃描總線法,提出了基於fpgaStandard practice for the selection of maximum transit - rate ratios and depths for the u. s. series of isokinetic suspended - sediment samplers
U . s .系列等動力懸浮-沉澱取樣器最大接轉速率比率和深度的選擇的標準操作規程Sse and sse2 instructions will be used for some scalar floating - point computations, when it is determined that it is faster to use the sse sse2 instructions and registers rather than the x87 floating - point register stack
時,優化程序將選擇何時以及如何使用sse和sse2指令。當確定使用sse / sse2指令和寄存器肯定要比使用x87浮點寄存器堆棧更快時, sse和sse2指令將用於某些標量浮點計算。
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