邊沿觸發 的英文怎麼說

中文拼音 [biānyánchùfā]
邊沿觸發 英文
edge control
  • 邊 : 邊Ⅰ名詞1 （幾何圖形上夾成角的直線或圍成多邊形的線段） side; section 2 （邊緣） edge; margin; oute...
  • 沿 : 沿名詞（水邊） water's edge; bank
  • 觸 : Ⅰ動詞1 （接觸） touch; contact 2 （碰; 撞） strike; hit 3 （觸動） touch 4 （感動） move sb ; sti...
  • 發 : 名詞（頭發） hair
  • 邊沿 : border; edge; fringe; margin; rim
  • 觸發 : detonate by contact; touch off; trigger; strike
  1. Either of them can meet the system. multiple ranges and multiple trigger modes choosing, calibration of card, data display, data saving and reading are all accomplished in software. we also talked about the difference between two methods

    用圖形化編程語言labview和c + +語言兩種方式編寫的採集程序都滿足了系統要求，實現了多種量程、多種觸發方式以及多觸發邊沿的選擇，採集卡自校，數據顯示與存取等功能。
  2. Flip - flop is the core of sequential circuits, this dissertation designed a synchronous set - reset edge - trigged jk flip - flop based on rt quantum devices, the jk flip - flop has strong function and high speed, and also riches the types of flip - flops in quantum circuits

    所設計的jk觸發器功能強，且與傳統的觸發器相比，基於rt量子器件的邊沿型jk觸發器具有量子器件的功耗低、速度快、電路簡單等特點。本文設計的jk觸發器豐富了量子電路中觸發器的種類，使得量子時序電路的設計更為靈活。
  3. According to the redundancy in digital circuits, we investigate the diversified redundancy - restraining techniques for lower - power cmos circuits. to erase the redundant transition of the clock, the logic design of double - edge - triggered flip - flop is presented and applied in sequential circuit design

    為消除時鐘信號的兀余跳變，提出了利用時鐘兩個方向跳變的雙邊沿觸發器邏輯發計並應用於時序電路設計中。
  4. In this paper, low power flip - flops designs by the reduction of the load of clock or the data path ; by the reduction of clock swing ; by the reduction of clock frequency and by the reduction of those idle transitions in cmos circuits with clock gating are discussed

    與此相對應的，在本論文中，分別對將少時鐘負載或數據通路的負載的觸發器設計；減小時鐘信號幅度的觸發器設計；降低時鐘頻率的雙邊沿觸發器設計以及應用門控技術來減少觸發器無效跳變設計的觸發器結構進行了討論。
  5. Design of double - edge - triggered dynamic flip - flop and its application

    雙邊沿動態觸發器的設計及其應用
  6. Based on the construction of traditional flip - flop, we propose a novel edge - triggered flip - flip using one latch controlled by narrow pulse according to race - hazard of clock. then this principle is adopted in ternary circuit, a new ternary d type edge - triggered flip - fiop based on cmos transmission gate is proposed

    在二值單閂鎖結構邊沿觸發器的基礎上，把利用時鐘信號競爭冒險的思想應用於三值電路中，提出了基於cmos傳輸門的二值d型時鐘信號競爭型邊沿觸發器。
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