邏輯編程語言 的英文怎麼說

中文拼音 [luóbiānchéngyán]
邏輯編程語言 英文
logic programming language
  • : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • : Ⅰ動詞1 (編織) weave; plait; braid 2 (組織; 排列) make a list; arrange in a list; organize; gr...
  • : 名詞1 (規章; 法式) rule; regulation 2 (進度; 程序) order; procedure 3 (路途; 一段路) journe...
  • : 語動詞[書面語] (告訴) tell; inform
  • : Ⅰ名詞1. (話) speech; word 2. (漢語的一個字) character; word 3. (姓氏) a surname Ⅱ動詞(說) say; talk; speak
  • 邏輯 : logic
  • 編程 : c programming
  • 語言 : language
  1. The circuits driving the ccd and processing the video signal are implemented by means of cpld ( complex programmable logic device ) and hdl ( hardvvare description language ). the solution to solve the problem of multi - level logical competitive risks that occur in cpld circuits frequently was provided in details in the thesis

    Ccd的驅動電路和視頻信號處理電路採用cpld (可器件)和hdl (硬體描述)實現,文章對cpld電路中容易出現的多級冒險競爭情況作了專門的敘述和提出相應的解決方法。
  2. We can write machine logic with advanced language directly, but implementing soft plc call for compiler

    我們可直接用高級寫機床,但實現軟plc的軟體需要序。
  3. It is an important character that using hdl describes function and behavior of logic device or system hardware

    使用硬體設計來描述器件及系統硬體的功能和行為是硬體描述設計方法的一個重要特徵。
  4. It implements filter groups design, wide range linear automatic gain control design, and the programmed logic device design based on vhdl, and discuss their application in initial radar system in details

    其中包括分段濾波器的設計技術,寬線性自動增益控制agc電路的設計技術,以及基於vhdl的可器件的設計技術,並對其在數據採集系統中的應用作了詳細的討論。
  5. Because period narrow band signals are the main part of background noises, this thesis uses hardware description language to design a multi - band finite impulse response filter ( fir ) and downloads the program into filed programmable gate array to eliminate the period narrow - band interferences in the background noises

    3 )在現場環境中,背景干擾主要是周期性的窄帶,本文利用硬體描述( vhdl )設計了一個多帶fir有限沖擊響應濾波器。應用到可器件中,消除了背景噪聲中的周期性干擾,為信號的進一步處理提供盡可能幹凈的信號。
  6. Main course : structure of network of structure of all of technology of principle of analysis of logic of technology of electron of circuit principle, imitate, number, number, computer, microcomputer, computer science department, computer, advanced language, assembly language, data, operating system

    主要課:電路原理、模擬電子技術、數字、數字分析、計算機原理、微型計算機技術、計算機系統結構、計算機網路、高級、匯、數據結構、操作系統等。
  7. 3. coding design and software programming. 4

    3 、可的譯碼設計以及匯
  8. This research based on the nc110 numerical control system of catch numerical control company, and write the logic program with the language siprom, and complete the soft plc compiled system with c program

    本文以凱奇數控公司的nc110數控系統為硬體平臺,以高級siprom寫用戶的機床序,用c序完成對數控系統軟plc的譯系統的設計。
  9. As a result, this design accomplishs the function of circuit, which not only can satisfy the high speed image data transmission of large screen system and improve the performance of circuit, but also increase the flexibility of circuit design. in the design, it is possible to act hardware description language procedure according to the practical application demand, instead of revising hardware design of the circuit, which reduce the design cycle and the cost

    所以,本課題運用可器件來完成電路功能,不僅能夠滿足大屏幕系統高速圖像數據傳輸對速度的要求,改善了電路性能,而且增加了電路設計的靈活性,設計中可以根據實際應用的需求靈活修改相應硬體描述序,而不需要修改電路硬體設計,縮短了設計周期,降低了成本。
  10. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點,在對目前微機勵磁控制器分析基礎上,提出採用dsp控制器晶元作為核心處理器的微機勵磁控制器的解決方案,運用復雜可器件cpld晶元實現可控硅同步脈沖觸發單元,並簡要說明了verilog硬體描述和數字脈沖形成的方法,通過電路數字模擬對所設計的數字觸發單元進行了驗證。
  11. The system uses the permanent magnet synchronous machine as the driver motor based on the idea of polygonal flux linkage locus and the permanent magnet brush - less motor is as the momentum balance motor by means of speed and current loop in order to track driver motor precisely and rapidly. the harmonious control of driver motor and balance motor is realized by making full use of the dsp hardware resource and complicated programmable logic device. the software design is composed of c and assembly language to realize motor control arithmetic of polygonal flux linkage locus

    衛星天線伺服控制系統以正弦波永磁同步電機作為驅動電機,採用多邊形磁鏈軌跡法(電壓空間矢量法)的控制策略;動量平衡電機採用永磁無刷直流電機,通過電流環、速度環達到快速、精確跟蹤驅動電機的目的,確保了衛星姿態恆定;設計方案中充分利用了dsp硬體資源和復雜陣列實現了驅動電機和平衡電機的協調控制,並通過c和匯的混合實現了電機的多邊形磁鏈軌跡控制演算法。
  12. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成;接著說明飛控計算機整體系統方案的設計;然後詳細說明飛控計算機硬體平臺的設計,包括ad轉換、多串口通信、外部存儲器的擴展以及採用可器件cpld實現電路的控制等幾部分,體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面;最後是軟體部分的,包括cpld部分的硬體描述序設計,和dsp部分相關的序設計。
  13. A testbench program is edited to simulate the behavior of the fifo. after the software simulation is accomplished, a real hardware circuit is designed to multiplex two data channels ( 1553b data channel and 1394 data channel ) according to ccsds standard. during the experiment and hardware debugging, the output logic of the fpga is checked up

    設計中,用vhdl對高速復接器進行行為級建模,為了驗證這個模型,首先使用軟體進行模擬,通過寫testbench序模擬fifo的動作特點,對序輸入信號進行模擬,在軟體模擬取得預期結果后,繼續設計硬體電路,設計出的實際電路實現了將來自兩個不同速率的信源數據( 1394總線數據和1553b總線數據)復接成一路符合ccsds協議的位流業務數據。
  14. Perhaps one of the most imposing hurdles is to develop a compiler language and new algorithms that take full advantage of the real - time reprogrammability of the logic gates

    最主要的障礙或許在於,科學家必須得發展出,能夠充份發揮閘可即時性質的與全新的演演算法。
  15. With the new methodology, the thesis put the journalism concept news values in the context of journalistic practice. learning from the developments of other disciplines such as psychology, communications, linguistics, analytic philophy, rhetoric, logic, the thesis analyses how news value works in every stage of journalistic practice : interviewing, writing and editing. it discovers the gap between the connotation and extension of the news value concept

    同時,本文通過該方法論應用,將「新聞價值」這一抽象新聞學理論概念還原到新聞實踐具體操作過中進行探討,並借鑒心理學、傳播學、學、分析哲學、修辭學、學等學科研究成果,對新聞價值在采訪、寫作、的具體實踐中所發生的價值現象轉向作嘗試性分析,從中揭示新聞價值概念內涵層面與外延適用的不同。
  16. 4 ) ontology editing tools based on 4gl ( such as java ) ca n ' t satisfy the actual needs of building ontologies, and they do not provide a right logic hierarchy ? right upper ontology

    ( 4 )基於第四代的本體工具均不能很好地滿足實用本體系統構建的需要,尤其是它們大都不具備頂級本體體系結構和對推理機制的表示能力。
  17. In programming languages, a logical assembly of one or more interrelated modules

    中,一個或多個互相關聯的模塊的一種組合。
  18. Unlike a traditional programming language implementation of a wsdl service, each operation of each porttype does not map to a separate piece of logic in bpel4ws

    不同於用傳統的來實現wsdl服務,每個porttype的每項操作並不映射成bpel4ws中的一個獨立的塊。
  19. The xsd - type system is more sophisticated and powerful than the type system of any programming language, and more importantly it is language - neutral. that makes wsdl the logical starting point to define the web services semantics

    Xsd的類型系統比任何的類型系統都更加復雜和強大,並且更重要的是,它是獨立於的,因此,它成為wsdl定義web服務法的起點。
  20. In the execution of such a program, an input statement can be logically deduced from other statements in the program. many artificial intelligence programs are written in such languages

    在這樣一個序的執行過中,一條輸入句可以按照序中的其他句推斷出來。許多人工智慧序使用這種寫。
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