邏輯陣列 的英文怎麼說

中文拼音 [luózhènliè]
邏輯陣列 英文
logic array
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 陣 : Ⅰ名詞1 （作戰隊伍的行列或組合方式） battle array [formation]: 布陣 deploy the troops in battle fo...
  • 列 : Ⅰ動1 （排列） arrange; form a line; line up 2 （安排到某類事物之中） list; enter in a list Ⅱ名詞1...
  • 邏輯 : logic
  • 陣列 : [統計學] array陣列處理機 array processor; 陣列印表機 array printer; 陣列雷達 [電學] array radar
  1. The hardware has two input channels of high - speed analog signal, with the signal amplitude of 0 - 5v, the conversion precision of 12bits, and the maximum sampling rate of 400ksps. this system includes 4 dsps ( adsp 2181 ), which can be arranged as a pipe line processing array. many algorithms can be realized in this system

    系統硬體有兩路模擬數據採集通道，模擬信號輸入范圍為0 ? 5v ，轉換精度為12位，最高采樣率400ksps ；系統包含4片dsp （ adsp2181 ）構成的流水線型的處理陣列，可用於實現各種演算法；系統的控制邏輯由fpga完成。
  2. In computers, a logic network in the form of an array of input leads andoutput leads with logic elements connected at some of their intersections

    在計算機中，由輸入線和輸出線陣列形成的一種邏輯網路，在它們的某些交叉點上用邏輯元件相連接。
  3. In computers, a logic network in the form of an array of input leads and output leads with logic elements connected at some of their intersections

    在計算機中，由輸入線和輸出線陣列形成的一種邏輯網路，在它們的某些交叉點上用邏輯元件相連接。
  4. In the third part, gives a new fft algorithm for realization ofdm modulation in fpga

    第三部分為在的現場可編程邏輯門陣列（ fpga ）上實現ofdm調制模塊。
  5. With the quickly development of field programmable gate array, fpga with more than million logic gates has been used

    隨著fpga （現場可編程門陣列）技術的快速發展，萬門以上乃至幾十萬門邏輯陣列的使用越來越普遍。
  6. The system uses the permanent magnet synchronous machine as the driver motor based on the idea of polygonal flux linkage locus and the permanent magnet brush - less motor is as the momentum balance motor by means of speed and current loop in order to track driver motor precisely and rapidly. the harmonious control of driver motor and balance motor is realized by making full use of the dsp hardware resource and complicated programmable logic device. the software design is composed of c and assembly language to realize motor control arithmetic of polygonal flux linkage locus

    衛星天線伺服控制系統以正弦波永磁同步電機作為驅動電機，採用多邊形磁鏈軌跡法（電壓空間矢量法）的控制策略；動量平衡電機採用永磁無刷直流電機，通過電流環、速度環達到快速、精確跟蹤驅動電機的目的，確保了衛星姿態恆定；設計方案中充分利用了dsp硬體資源和復雜邏輯陣列實現了驅動電機和平衡電機的協調控制，並通過c語言和匯編語言的混合編程實現了電機的多邊形磁鏈軌跡控制演算法。
  7. A set of two or more disks that may appear to the system as one large disk. a disk array can be either a software or a hardware device

    磁盤陣列：由一組兩個或者多個磁盤組成，就系統而言可以看作是一個大的邏輯磁盤。一個磁盤陣列不僅可以當一個軟體裝置，也可以當作一個硬體裝置。
  8. A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software

    磁處理器由邏輯閘陣列所組成，其中每個閘都可以由軟體獨立編程。
  9. Cracking a data encryption and decryption system using multi - valued logic array

    對一種基於多值邏輯陣列變換的加解密系統的破解
  10. Pld refer to the programmable logic device. it is a kind of chip that can be written the design of integrated circuits into its logic arrays

    Pld是指可編程邏輯器件，是一種可將集成電路的設計用編程的方式寫入到其邏輯陣列結構中的一種晶元。
  11. Programmable logic array

    可編程序邏輯陣列
  12. Thirdly, to design gateway control by gal apparatus

    應用通用邏輯陣列（ gal ）器件對通路控制進行設計。
  13. Cellular logic array

    細胞邏輯陣列
  14. Pla specification for harmonized system of quality assessment for electronic components - blank detail specification : programmable logic arrays

    電子元器件用質量評估協調體系規范.空白詳細規范:可編程序的邏輯陣列
  15. This course consists of lectures and labs on digital logic, flipflops, pals, counters, timing, synchronization, finite - state machines, and microprogrammed systems

    本課包括了數字邏輯、觸發器、 pal （可編程邏輯陣列） 、計數器、時序、同步、有限狀態機、和微控制系統方面的講課與實驗。
  16. To realize the real - time tracking image target, we use the cpld ( c ' omplex programmable logic device ) to control the system logic and use ipga ( field programmable gate array ) to preprocessing the image

    為了滿足系統的實時性要求，運用大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理。
  17. And then, aiming at the deficiency of conventional design, the high - compositive fpga ( filed programmable gate array ) chip is used as the core in this project to deal with the signal of six encoders in real time

    其次針對以往設計的不足，採用了以高度集成的fpga （現場可編程邏輯陣列）晶元為核心的設計方式，實現六路光電編碼器信號的同步實時處理。
  18. The system used hight - performance dsp ( tms320c6202 ) to realize the real - time image object tracking algorithm, used large - scaled programmable logical array cpld to control logic and field programmable gate array fpga to preprocessing the image

    其中運用了高性能dsp （ tms320c6202 ）完成實時圖像目標處理演算法，並結合大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理，滿足了系統的實時性。
  19. There are many encryption algorithms. even for one algorithm, rsa, for example, the architectures of different modular length rsa are not same. the dissertation focuses on the research and design of the reconfiguration in the encryption application using fpga

    在現場可編程邏輯陣列fpga上，實現多種加密演算法以及不同長度密鑰的rsa演算法的可重構，在目前對開展可重構計算技術在加密方面的應用基礎研究和研發有自主版權的加密硬體技術有一定的意義。
  20. For the high - speed digital signal processing, the structure of fpga and dsp is widespreadly adopted. dsp is more featured in the implementation of complicated algorithm, while field programming gate array ( fpga ) shows more advantage in its flexibility of design, simplicity of system configuration, modification and maintenance. in the paper, the hardware system of the spaceborne radar is based on the structure of fpga and dsp, of which the signal processing part is accomplished with one fpga chip and multi dsps

    Dsp適合完成結構復雜的演算法;現場可編程邏輯陣列（ fpga ）適合完成高效、演算法固定的任務;與專用集成電路（ asic ）相比， fpga優點主要在於其很強的靈活性、可在線配置、修改和維護方便等優點。本文工程中的星載雷達信號處理和控制系統就是採用dsp + fpga的方式。其中信號處理採用的是xilinx公司的virtex -和virtex系列fpga和多片analogdevices公司的tigersharcts101的硬體電路結構。
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