鑒頻電路 的英文怎麼說

中文拼音 [jiànbīndiàn]
鑒頻電路 英文
discriminator circuit
  • : Ⅰ名詞1 (鏡子 古代用銅製成) ancient bronze mirror2 (可以作為警戒或引為教訓的事) warning; objec...
  • : Ⅰ形容詞(次數多) frequent Ⅱ副詞(屢次) frequently; repeatedly Ⅲ名詞1 [物理學] (物體每秒鐘振動...
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Development of hybrid integrated circuit of high linearphase - locked frequency discriminator

    混合集成高線性鎖相模塊的研製
  2. The pll consists of a crystal oscillator, a ring voltage - control - oscillator, a frequency divider, a phase / frequency detector, a charge pump and a loop filter

    設計的包括20mhz晶體振蕩器,相器,壓控振蕩器,固定分器,荷泵和低通濾波器。
  3. The designs of the pfd, digital filter ocxo and fractional - n counter in the frequency synthesizer unit are discussed, based on the pll theory. in order to improve the precision of pll, some design methods of pfd are given, and its feasibility is validated by the fpga hardware implement

    2 .在鎖相理論指導下,第三章討論了率合成器設計中的相器、數字濾波器、恆溫壓控振蕩器和分設計。為了進一步提高率合成的精度,文中給出了提高相器性能的一些設計思想,結合fpga的硬體設計驗證了其可行性。
  4. Eddy - current sensor conversion circuit consist amplification circuit, band - pass filter circuit, demodulation circuit, differentiation phase and data sampling circuit. these circuits are used to convert the test signal of eddy - current sensor to discrete signal tend to process. the microprocessor system that formed of dsp chip is used to data fitting of test system, data displaying and data communicating with personal computer, etc. the interference questions of hardware design and the measure of eliminating interference signal in the subject are introduced in the last of this chapter

    硬體的設計主要分三大部分來實現:激勵源部分,由分率合成組成,產生率穩定的激勵信號以確保檢測任務的正常進行;傳感器變換部分,由放大、濾波、檢波和數據採集組成,主要將渦流傳感器檢測線圈檢測到的信號變換成只含有被測信息的離散信號,易於后續處理;由dsp晶元構成的微處理系統,主要完成檢測系統的數據擬合、顯示及與主機通信等功能。
  5. For digital audio encoding and decoding modules, delta - sigma modulation is introduced and audio data, preambles with accessorial data are multiplexed according to the digital audio interface standard ; for carrier wave, pll frequency synthesizer is used ; for frequency modulation, voltage control oscillator is taken ; for demodulation, pll frequency discrimination is adopted

    調制方式,並按照數字音介面標準對音數據、同步字和附加信息進行通道復用;對于載波信號,採取鎖相環率合成技術手段;對于率調制,採用壓控振蕩器;對于解調,採取鎖相環鑒頻電路
  6. Semiconductor integrated circuits detail specification for type jb726 limit amplifier discriminator

    半導體集成. jb726型限幅放大器詳細規范
  7. In this paper, they are set forth at first that the kinds of computer - simulation of electronic devices, the development and the requirements of mosfet ' s model and the way of gain the models " parameters, the dc models have been bui it in chapter 2 and the models of big signals have been deduced in chapter 3, they are different from the equivalent circuit models in the traditional software pspice that they come from the numer i ca i - s i mu i at i on wh i ch is based on the essence equat i on, so the precision of simulation is enhanced ? mosfet ' s small signal models of low frequency, intermediate frequency and high frequency have been built in chapter 4 and chapter 5, although the equivalent circuit models in pspice are used for reference to bui id them, they have their own characteristics which are analyzed at a i i kinds of situations, so that the simulation software for mosfet can be written according them and it i s a i so benef i c i a i for us to catch the gen i us character i st i cs of mosfet and to d esign all kinds of applicable devices the correctness of the models is simply proved in chapter 6

    本文首先介紹了子器件計算機模擬的分類、 mosfet的建模發展動態、對器件模型的要求以及模型參數的提取方法。在第二章中建立了mos晶體管在直流端壓條件下的工作模型;第三章推導了mosfet的大信號模型,這兩類模型不同於傳統模擬軟體例如pspice中的等效模型,而是從模型方程出發,採用數值模擬的方法,提高了模擬的精度。第四章和第五章分別建立了mos晶體管低、中、高的小信號模型,雖然借了pspice模擬軟體中用等效模型的方法,但是本文分別討論了準靜態和非準靜態時器件的本徵部分以及包含非本徵部分工作于低、中和高條件時的模型,可以根據這些模型編寫相應的模擬軟體,這樣在做器件的模擬分析與器件設計的時候,就可以利用模擬軟體逐步深入地分析器件在不同的條件下和器件的不同部分在工作時的各種小信號特性,有利於抓住器件工作的本質特性,設計出符合要求的各類通用和特殊器件。
  8. Finally introduced the method that use adf4113 and provied the real test result of this multi - frequency, low phase noise pll frequency synthesizer with 30mhz working band and 1mhz frequency step. in addition, some method that solved the problem often occurred was introduced

    最後給出了由ad公司的流泵數字相器adf4113和無源環濾波器構成的率合成器的控制方法和實驗測試結果,實現了工作帶寬30mhz ,率步進1mhz的多點、低相噪率合成器。
  9. Research on the design of programmability frequency multiplier and phase detector on isp devices

    器件的可編程倍相邏輯的設計
  10. The main task including : when the raster ruler and axis - angle coder move forward or backward, they will bring pulse signals which are length signals and angle signals. these signals will be sent to signal processing circuits to be pretreated. then the signals will be sent to direction differentiation circuits to differentiate the directions

    主要完成以下任務:把光柵尺和軸角編碼器前進或後退產生的長度信號和角度信號,送信號處理進行處理,再送相倍進行相處理,送單片機計數,由另一片單片機把計數的結果數據經過串列通訊送至pc主機去進行處理。
  11. The experiments indicate that the new mdrlg has high precision and the phase - demodulation and frequency stabilizing circuits work fine and stably

    測試結果表明新研製的機抖陀螺有較高的精度,相解調正確,穩性能較好、工作穩定。
  12. The amplitude discrimination circuit, the filter circuit and the amplifying circuit are designed to transform ac analog signal that the eddy current sensor output to dc analog signal, thus, the dc analog signal can be received by ad converter

    傳感器輸出的測量信號是中的交流模擬信號,在下位機系統設計了幅、濾波、放大將測量信號轉化為模數轉換器可以接受的直流信號。
  13. The basic operation principle of phase - locked frequency synthesizer and the type of circuits are expatiated systematicly in this paper. the principle of operation on sampling phase detector and some characteristics including the linear tracking and phase noise in phase loop circuits are analyzed deeply. the research is emphased on the theory and design method of circuits in the sampling phase - locked frequency synthesizer. then, the expansion capturing circuit is analyzed and designed for better performance of capturing loop circuits. at last, the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling - holder. the general research on the theory and technology of sampling phase lock in the paper will make a basement for the development of new product

    本文系統的闡述了鎖相率合成器的基本工作原理及類型;較深入地分析了取樣相工作原理及、鎖相環的線性跟蹤特性和相位噪聲特性;重點對取樣鎖相率合成器理論和設計方法進行了研究;為了改善環的捕獲性能,對擴捕進行了分析和設計,並用wewb32軟體對進行了模擬;考慮到取樣保持器的附加相移影響,對環濾波器進行了分析和設計。
  14. The developments of high - speed circuits and mmic pose the problem of analyzing the circuits characterized both in time and frequency domains. a variety of mixed time - frequency methods have been developed during the last quarter century in the research of the vlsi interconnect and package analysis and nonlinear steady - state analysis. this paper examines these methods from a unified point of view. various mixed problems are formulated as circuit equations in the mixed time - frequency domain. fundamental approaches to slove the equations are given, from which all of the published mixed methods can be naturally deduced. this facilitates the comprehension of these methods and is helpful for their applications. some new ideas are proposed based on the cross reference among these different kinds of methods

    隨著高速集成及mmic (微波單片集成)的發展,提出了對時-混合表示進行分析的任務.本文用統一的觀點考察了通常屬于高速互連與封裝分析、非線性穩態響應分析兩個不同方面的混合分析問題,指出這類問題的實質是要求解一個時-混合的方程,給出了求解這一方程的基本思,闡明了現有的各種方法是如何從這一基本思導出的.這可為認識這些方法的本質與聯系,促進它們的應用與發展提供參考.此文還探討了某些方法之間的相互借,提出了若干新的想法
  15. In this paper, a pll frequency synthesizer working in l band is researched. at fist, we review the basic of phase lock loop and it ' s constituent part. after that the basic conception and design method of pll frequency synthesizer was introduced, especially introduced the charge pump pll frequency synthesizer in detail

    本文是採用鎖相原理設計的l波段率合成器,首先對鎖相環的工作原理和基本組成部分進行了簡單的介紹,然後介紹了鎖相率合成器的原理和設計方法,主要介紹了目前小型率合成器產品中使用最廣泛的由荷泵數字相器和無源環濾波器構成的率合成器。
  16. Then according to the emphasis of the design, went deeply into the theory of pll frequency synthesizers widely used, described pll ’ s working principle, structure and several types in detail, and made research and analysis of pll frequency synthesizers ’ phase noise, including the effect of the active loop filter on the phase noise, and give some methods to make improvement as well, such as changing loop filter form, reducing divide number, and increase phase detector frequency, etc. then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit, which are also important circuits in the design

    論文首先對幾十年率合成器的發展進行概述,而後針對本次設計的重點,對應用較為廣泛的鎖相率合成理論進行了深入的探討,詳細介紹了鎖相環的工作原理、組成結構和鎖相類型,並對鎖相率合成器的相噪特性進行了研究分析,包括有源環濾波器對于相噪的影響,提出了改善相位噪聲的幾點措施:改善環形式、降低分數、增大率等。接著介紹了直接數字率合成器( dds )和注入鎖相的原理特點以及相噪分析,它們也是本次設計的重要
  17. The thesis describes a prototype fractional frequency synthesizer which is supported by a project granted by the ministry of science and technology of pr china. firstly, based on the principle of pll, this paper briefly describes three basic pll components : phase detector ( pd ), low pass filter ( lpf ), voltage controlled oscillators ( vco ), analyzes the linearized pll and summaries the transfer functions of third - order pll with ideal intergrator filter respectively. based on a microwave vco, the single point frequency pll frequency ranging from 2. 2 to 2. 5ghz is developed

    首先,從鎖相環的基本理論、原理出發,分析了鎖相環中的三個基本部件:相器、環濾波器和壓控振蕩器,此後,針對線性化鎖相環進行了分析,研究了在使用比例積分濾波器時,三階鎖相環的環參數計算;在實現時選用了lmx2353 ,在此基礎上,完成了2 . 2 ~ 2 . 5ghz范圍內的小數率合成器設計。
  18. By integeral design of the senser and the circuits, the products has advantages of minisize, light weight, wide responding range, high sensitivity, etc. the results of performance test and environment examination indicate that, the design is reasonable, the arts rational, all performances arrive or exceed the demands of the contract. the product has passed the appraise rate of minister, arrived the international leading level

    該傳感器具有微型化、重量輕、響寬、靈敏度高、傳感器與調理一體化的特點。經性能測試和環境試驗表明:該傳感器設計合理、工藝可行,各項性能指標均達到或超過合同規定的要求,通過部級定,達到國際先進水平。
  19. On the basis of analyzing the old system and theory, the element circuits of wireless digital audio transceiver modules are designed in detail including the digital audio encoding and decoding circuits with the surrounding circuits, the fsk circuit based on pll frequency synthesizer, the power amplifier circuit, the frequency discrimination and agc circuit

    在分析原系統結構和理論的基礎上,完成了整個無線數字音傳輸模塊各單元的設計。主要包括有數字音編碼和解碼及外圍的設計、基於鎖相率合成器理論的fsk設計、功率放大器的設計、與agc控制的設計。
  20. This subject aim at designing a linear power amplifer whose output power is 40w for 225 - 450mhz band. but it seems not easy to finish the task because of this power amplifier own unique requirements including high output power, broad working frequency band, high linearity, and flat gain. due to the complexity involved, theoretically several soltuions are derived in the final scheme such as broadband matching technology, power - retreat, power synthesize, automatic power control and negative feedback. in addition, the design will be optimized by eda software and the final test result indicates that our design is successful

    本課題的目標是研製一個輸出功率為40w的225 450mhz的線性功率放大器。由於該功放要求輸出功率大,工作帶寬,帶內增益波動小,線性度高,所以其終合設計難度大。于這個原因,在理論設計上筆者採用了寬帶匹配、功率合成、功率回退、負反饋、自動功率控制等技術;在實踐中精心設計,並且配合eda軟體模擬,最終達到所要求的指標。
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