陣列流水演算法 的英文怎麼說

中文拼音 [zhènlièliúshuǐyǎnsuàn]
陣列流水演算法 英文
array pipelining algorithm
  • : Ⅰ名詞1 (作戰隊伍的行列或組合方式) battle array [formation]: 布陣 deploy the troops in battle fo...
  • : Ⅰ動1 (排列) arrange; form a line; line up 2 (安排到某類事物之中) list; enter in a list Ⅱ名詞1...
  • : Ⅰ動1 (液體移動; 流動) flow 2 (移動不定) drift; move; wander 3 (流傳; 傳播) spread 4 (向壞...
  • : 名詞1 (由兩個氫原子和一個氧原子結合而成的液體) water 2 (河流) river 3 (指江、河、湖、海、洋...
  • : 動詞1 (演變; 演化) develop; evolve 2 (發揮) deduce; elaborate 3 (依照程式練習或計算) drill;...
  • : Ⅰ動詞1 (計算數目) calculate; reckon; compute; figure 2 (計算進去) include; count 3 (謀劃;計...
  • : Ⅰ名詞1 (由國家制定或認可的行為規則的總稱) law 2 (方法; 方式) way; method; mode; means 3 (標...
  • 陣列 : [統計學] array陣列處理機 array processor; 陣列印表機 array printer; 陣列雷達 [電學] array radar
  • 流水 : 1 (流動的水) running water; stream2 (舊時指商店的銷貨額) turnover (in business)流水搬運作用...
  1. The hardware has two input channels of high - speed analog signal, with the signal amplitude of 0 - 5v, the conversion precision of 12bits, and the maximum sampling rate of 400ksps. this system includes 4 dsps ( adsp 2181 ), which can be arranged as a pipe line processing array. many algorithms can be realized in this system

    系統硬體有兩路模擬數據採集通道,模擬信號輸入范圍為0 ? 5v ,轉換精度為12位,最高采樣率400ksps ;系統包含4片dsp ( adsp2181 )構成的線型的處理,可用於實現各種;系統的控制邏輯由fpga完成。
  2. Improve on algorithms can enhance encoding / decoding performance. with pipeline and systolic array architectures adopted in the hardware implements, encoder / decoder based on fpga can work better

    對編譯碼的改進有助於提高rs編譯碼器的性能,而利用fpga來實現rs編譯碼器,並採用線、心縮式等優化結構,更能提高編譯碼器的性能。
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