集成邏輯電路 的英文怎麼說
中文拼音 [jíchéngluódiànlù]
集成邏輯電路
英文
integrated logic circuit- 集 : gatherassemblecollect
- 成 : Ⅰ動詞1 (完成; 成功) accomplish; succeed 2 (成為; 變為) become; turn into 3 (成全) help comp...
- 邏 : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
- 輯 : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
- 電 : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
- 路 : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
- 集成 : integration集成晶體管 integrated transistor; 集成元件 integrated component
- 邏輯 : logic
- 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
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With the rapid development of electronic technology, vlsi ( very large scale itegrate circuits ) is widely applied in the electronic equipments. the structure of vlsi is complex, and the density of tube feet is intensive, logic is complicated
隨著電子技術的飛速發展,電子設備中大量使用大規模集成電路晶元,其結構緊湊,而且電路的管腳密集、邏輯復雜。A monolithic integrated logic circuit of resonant tunneling diodes and a hemt
的單片集成邏輯電路Nowadays, all functions of a calculator including calculating units, display driver, keyboard interface and so on, are integrated on one single chip
現代計算器使用一塊集成電路晶元來完成各種運算、顯示驅動和鍵盤介面等完整功能,依賴的是高度集成的動態cmos邏輯和微碼設計技術。In chapter three, the all sub - circuits including uvlo, current bias, ldo, oscillator, green mode, slop compensation, power limiting, pwm, ovp, blanking time generator, logic controller are designed and simulated. as a result, all of the sub - circuits are satisfied the requirements
本文第三章對集成電路內各個模塊包括欠壓保護、電流偏置、 ldo 、振蕩器、綠色模式、斜坡補償、功率限制、脈寬調制、過壓保護、前沿消隱、邏輯控制電路等進行了設計與模擬,且達到了預定的設計目標。Complex programmable logic device ( cpld ), usually used to develop asic, is widely used in digital system to accomplish complex combinational and sequential logic
復雜的可編程邏輯器件( cpld )廣泛地用於數字系統中,常用作設計自己的專用集成電路,可實現復雜的組合邏輯和時序邏輯。This design for mvbc system adopts top - down eda common design flow. circuit design adopts veriloghdl coding description. function simulation and timing verification adopt simulation tool vcs of synopsys inc, the logic synthesis tool and fpga programming tool adopt the quartus ii of altera inc, and the fpga advice stratix ii ep2s15
該mvbc系統設計採用業界通用的自上而下的eda設計方法,電路邏輯實現採用veriloghdl硬體語言描述,功能和時序驗證的動態模擬採用synopsys公司的vcs ,而邏輯綜合與fpga實現採用altera公司的集成開發環境quartusii軟體以及stratixiiep2s15的fpga器件。This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed
本論文的主要研究工作包括:通信協議轉換邏輯的功能分析和設計需求;通信協議轉換邏輯上行方向的系統分析及體系結構設計,包括上行接收狀態機、發送狀態機、信元內位元組位置調整機制等的設計;通信協議轉換邏輯上行方向的線速設計,主要是上行接收的線速設計,要使用流水設計技術;提出了高速實現roundrobin調度策略的實現方法,並設計實現了桶式移位器和優先級編碼電路;應用bfm模擬模型設計了上行處理各模塊的模擬testbench ,完成了各級模塊的模塊模擬和系統集成模擬。During that short period, the tester must also capture the output value of the ic
在這個過程中,對輸入端施加一個短時的比邏輯值高的電流,同時測試儀器要捕捉到集成電路的輸出值。Therefore it comes true the on - line adjusting, real - time control and so on. it sames as real locale. the software of logic protect ( include electric logic ) and control includes some usual algebraic and operation model of thermal control and logic operation of logic protect. it adopts foxboro ' s dcs as a example, so we configuration via filling table, user only define i / o condition, fill certain operation variable, and name logic variable. the software offers a friendly user ' s interface, personnel can compile and modify the control and logic program, change the value of logic and control variable conveniently, attach themselves to run, debug and control the set, not need to know about the inside of the old programs deeply. so the configuration software offer a flat that control engineer can attend to the structure of control loop and logic protect ( include electric logic ), not but to handle complicated program
它以foxboro的dcs控制系統為主要參考模式,採用填表的方式進行控制組態,用戶只需定義i / o條件、填寫具體的運算變量名、邏輯變量名即可。本軟體為建模人員提供了一個友好的用戶界面,使建模人員在建模時不必對模塊內部的控制、邏輯程序有很深的了解就可以方便的對其進行編寫和修改,實時改變各邏輯和控制變量在數據庫里的值,參與運行和調試,從而實現對機組的控制。因此,本組態軟體提供的這樣一個平臺,讓控制工程師能集中精力于控制迴路及邏輯保護(包含電氣邏輯)的構成,而不必拘泥於一些具體而煩瑣的程序操作。In this paper, a firing - pulse generator based on measuring ac system frequency is presented. a modern programmable asic fpga is used to build logical circuits
本文比較了邏輯圖輸入法和vhdl設計法這兩種集成電路的設計方法,最後選用vhdl來設計fpga晶元。Thirdly, the paper researchs the application of single electron transistor and the synthesis theory of cicuit based on quantum dot cellular automata by synthesis example of quantum cellular neural network based on build schr ? dinger equation of coupling quantum dot. at last, the paper researchs digital integrated circuit design based on quantum dot cellular automata and design a 8 - bit quantum dot cellular adder by qcadsign based on a method of majority logic reducetion for quantum cellular automata, it prove this designer of 8 - bit quantum dot cellular adder is correctly
Dinger )方程為基礎的量子點細胞自動機電路綜合理論,本文以量子細胞神經網路為綜合實例,建立耦合量子點的薛定鄂( schr ? dinger )方程組,通過化簡得到類似細胞神經網路的非線性電路方程。最後研究了基於量子點細胞自動機數字集成電路設計,通過建立邏輯方程,簡化邏輯方程,並設計基於精簡qca擇多邏輯門8位加法器,並用qcadesign進行了模擬,實驗證明設計正確性。The teaching difficulty of the course of digital circuit basis mainly focuses on some knowledge of components, for example, semiconductor basis, separation and integration logic gate circuits
摘要《數字電路基礎》課程的教學難點主要集中在半導體基礎、分立和集成邏輯門電路等元器件知識部分。The important part in photoelectric transform circuits is design of driving circuits and signal processing circuits about linear ccd. the time order driving circuit of ccd are designed and debugged with cpld ( complicated programmable logic device ), which make the whole driving circuit ' s volume very small, shorten design period, modify design at any time, and enhance reliability and agility of circuit
在設計過程中,採用了一種復雜可編程邏輯器件( cpld )設計線陣ccd驅動脈沖電路的新方法,只對器件進行重新編程,在不改變任何硬體的情況下,就可以實現驅動器的更新換代,非常適合線陣ccd脈沖產生電路的設計研究,具有高集成度、高可靠性、開發時間短、投資少等優點。Semiconductor devices - integrated circuits - digital integrated circuits - blank detail specification for programmable logic devices
半導體器件.集成電路.數字集成電路.可編程序邏輯設備的空白詳細規范With high speed and large - scale integration of electronic circuits, boolean algebra is insufficient to describe the complicated logic behavior of digital circuits
近些年來,隨著電子電路的高速化和大規模集成化,布爾代數作為描述數字電路的邏輯行為的工具,越來越顯示其不足1. a small and cheap 8 - bit microcontroller is used as control core. all components of the sensor, some of which are necessary for the multiple and intelligent functions, are selected ones with low cost and small package. by designing all auxiliary logic circuits in a complex programmable logic device ( cpld ), and integrating all analog circuits in an application specific ic ( asic ), the size of pcb board is greatly reduced, which make it possible that the pcb can be installed with the displacement detector together
系統採用小型廉價8位微控制器控制,電路內配置了為實現多功能智能化所必需的硬體,並全部採用低價格、小體積器件,還將所有輔助邏輯電路設計在一片復雜可編程邏輯器件cpld內,所有模擬電路集成於一片專用集成電路asic內,大大縮小了電路板尺寸,再與傳感元件組裝在一起,從而使整個系統在保證智能化功能的前提下,具有體積小、成本低、一體化和抗干擾能力強的特點。With the rapid development of semiconductor, digital integrated circuit ( p, memory, standard logic gates, etc. ) and advance computer technology, the various measuring instruments ( virtual instruments ) with the powerful function of pc are produced in different industrial and scientific research fields. as we all known, the traditional instruments are usually built with discrete components and small scale ics, the disadvantages are obvious in system design, debugging and maintenance
隨著半導體技術與數字集成電路(微處理器、存貯器以及標準邏輯門電路等)技術的迅速發展,特別是隨著計算機技術的發展,在工業生產和科學技術研究的各行各業中,人們利用pc機的強大處理功能代替傳統儀器的某些部件,開發出各種測量儀器(虛擬儀器) ,傳統儀器的數字邏輯部分多是採用分立集成電路( ic )組成,分立ic愈多,給系統的電路設計、調試及維護帶來諸多不便。Pld refer to the programmable logic device. it is a kind of chip that can be written the design of integrated circuits into its logic arrays
Pld是指可編程邏輯器件,是一種可將集成電路的設計用編程的方式寫入到其邏輯陣列結構中的一種晶元。And then, aiming at the deficiency of conventional design, the high - compositive fpga ( filed programmable gate array ) chip is used as the core in this project to deal with the signal of six encoders in real time
其次針對以往設計的不足,採用了以高度集成的fpga (現場可編程邏輯陣列)晶元為核心的設計方式,實現六路光電編碼器信號的同步實時處理。Then, with considering the technical problem that existed in the applying process of the frequency modulation inductance sensor, the integration of the data acquisition circuitry and interface circuitry of this kind of sensor have been studied and the circuitry system with better performance using pld has been developed. at the end of this thesis, the measuring software and some experiments that tests the whole system are introduced
然後,針對調頻式電感傳感器在過去使用中遇到的技術難題,對該類傳感器數據採集及微機介面電路進行了集成化研究,採用可編程邏輯器件技術設計出了高性能的儀器數據採集及控制系統的硬體電路系統,最後編制了測量軟體且進行了一系列驗證系統性能的測量實驗。分享友人