電位均衡器 的英文怎麼說

中文拼音 [diànwèijūnhéng]
電位均衡器 英文
potential equalizer
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : Ⅰ名詞1 (所在或所佔的地方) place; location 2 (職位; 地位) position; post; status 3 (特指皇帝...
  • : Ⅰ形容詞(均勻) equal; even Ⅱ副詞(都; 全) without exception; all
  • : Ⅰ名詞1 (秤桿) the graduated arm of a steelyard2 (稱重量的器具) weighing apparatus3 (姓氏) a...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 均衡 : 1 (平衡的) balanced; proportionate; harmonious; even 2 (平衡) equilibrium; equilibration; equ...
  1. The thesis is composed of 9 parts : the background, significance, main topics and innovations in the thesis are introduced in chapter 1 ; in chapter 2, the main function and performance of interface circuits are described from the view of system by using the example of gigabit ethernet ' s transceiver ; the transmission media ' s frequency characteristics and model are analyzed for the high - speed data transmission system in chapter 3 ; the line driver is presented in chapter 4 ; the equalization principles for high - speed data transmission system are introduced in chapter 5 ; a novel adaptive equalizer for 1000base - cx transceiver is presented in chapter 6 ; in chapter 7, a fixed equalizer for 2. 5gbps transceiver is described ; in chapter 8, layout design and measured results are discussed ; at last, the conclusions are drawn in chapter 9. during period of finishing the thesis, i read lots of literatures about the interface circuits in high - speed data transmission system, studied their principles and design techniques, and designed : 1 、 the line driver for 2. 5gbps baseband copper cable transceiver ; 2 、 the fixed equalizer for 2. 5gbps baseband copper cable transceiver ; 3 、 the fixed equalizer for 1. 5gbps sata ( serial at attachment ) transceiver ; 4 、 an adaptive equalizer for 1000base - cx transceiver

    論文由9部分組成:在第一章引言中介紹了論文的背景、意義、國內外研究現狀,以及論文的主要內容和創新;第二章以千兆以太網為例,從系統的角度介紹了高速數據傳輸系統介面路的主要功能和性能指標;第三章分析了高速數據傳輸系統的傳輸介質的頻率特性和模型;第四章描述了線驅動的設計原理及其路實現;第五章描述了高速數據傳輸系統的原理;第六章描述了適用於1 . 25gbps基帶銅纜收發系統的自適應的設計原理和路實現;第七章描述了適用於2 . 5gbps基帶銅纜收發系統和1 . 5gbps串列硬盤介面( sata )收發系統的固定的設計原理及其路實現;在第八章中分析了路的版圖設計及晶元測試結果;最後,第九章總結了全文。在完成論文期間,查閱了大量的有關高速數據傳輸系統介面路方面的文獻,較系統地學習了線驅動、傳輸線和等方面的理論知識和路設計原理,設計了用於: ( 1 ) 2 . 5gbps基帶銅纜收發系統的線驅動; ( 2 ) 2 . 5gbps基帶銅纜收發系統的固定; ( 3 ) 1 . 5gbpssata系統的固定; ( 4 ) 1 . 25gbps基帶銅纜收發系統的自適應
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