電源抑制比 的英文怎麼說

中文拼音 [diànyuányìzhìbǐ]
電源抑制比 英文
psrr
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 源 : 名詞1. （水流起頭的地方） source （of a river）; fountainhead 2. （來源） source; cause 3. （姓氏） a surname
  • 抑 : Ⅰ動詞（向下按; 壓制） restrain; repress; curb Ⅱ連詞[書面語]1 （表示抉擇） or 2 （表示轉折） but3 ...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  • 比 : Ⅰ動詞1 （比較; 較量高下、 長短、距離、好壞等） compare; compete; contrast; match; emulate 2 （比...
  • 電源 : source; current source; electric source; power pack; power supply; power source; source of power ...
  • 抑制 : 1 （控制） restrain; control; check; hold up; curb; stop; repress; bridle; choke; prehension; sup...
  1. In the sub block circuit design, the contents that the author had introduced include : the principle of band gap voltage reference and the design technique in low power supply ; the analysis of spike pulse noise rejection, frequency divider and dead time in oscillator and control circuit ; the selection of the width and length ratio of four switches and 2x / 1x mode change point in driver and mode selection circuits

    在子電路設計中，作者比較深入分析的內容有:基準電路的原理及低電源電壓下基準電路的設計;振蕩器和控制電路中尖峰脈沖噪聲抑制、兩分頻電路及死區時間設定;驅動及模式選擇電路中開關管的寬長比的選擇及模式轉換點的設計。
  2. We obtained ptat and ctat current generator with low power consumption and high psrr, which in a simple circuit structure

    用較簡單的電路形式實現了低功耗和高電源抑制比的ptat電流產生電路和ctat電流產生電路。
  3. The simulation result shows that, the cmrr of current - mode instrumentation amplifier be able to reach 97db, and the psrr to 85db

    儀表放大器的模擬結果表明，在沒有激光調阻技術支持下，本文設計的電流模儀表放大器的共模抑制比能夠達到97db ，電源抑制比能夠達到85db 。
  4. Based on the hydrodynamic energy transport model, the influence of variation of negative junction depth caused by concave depth on the characteristics of deep - sub - micron pmosfet has been studied. the results are explained by the interior physical mechanism and compared with that caused by the source / drain depth. research results indicate that with the increase of negative junction depth ( due to the increase of groove depth ), the threshold voltage increases, the sub - threshold characteristics and the drain current driving capability degrade, and the hot carrier immunity becomes better in deep - sub - micron pmosfet. the short - channel - effect suppression and hot - carrier - effect immunity are better, while the degradation of drain current driving ability is smaller than those with the increase of depth of negative junction caused by source / drain junction shallow. so the variation of concave depth is of great advantage to improve the characteristics of grooved - gate mosfet

    基於能量輸運模型對由凹槽深度改變引起的負結深的變化對深亞微米槽柵pmosfet性能的影響進行了分析，對所得結果從器件內部物理機制上進行了討論，最後與由漏源結深變化導致的負結深的改變對器件特性的影響進行了對比.研究結果表明隨著負結深（凹槽深度）的增大，槽柵器件的閾值電壓升高，亞閾斜率退化，漏極驅動能力減弱，器件短溝道效應的抑制更為有效，抗熱載流子性能的提高較大，且器件的漏極驅動能力的退化要比改變結深小.因此，改變槽深加大負結深更有利於器件性能的提高
  5. On the one hand, the design uses low voltage cascode op framework to improve its gain ; on the other hand, it applies self - bias and cascode structure to the whole sensing circuit. by using the improved method, we have successfully obtained low power consumption, low offset, high linear and high psrr ptat current generator under low power supply

    在電路設計上一方面改進運放結構，採用低壓共源共柵結構以提高其增益，另一方面整體傳感電路採用自偏置結構和共源共柵電流鏡結構，在低電源電壓下成功設計了低功耗、低失調、高線性度和高電源電壓抑制比的ptat電流產生電路。
  6. 2. the input stages of the ccii and the operational amplifier in transimpedance implifier are realized with folded cascode amplifier to reach high cmrr, large open loop gain and low offset

    2 .為了提高儀表放大器的電源抑制比，並得到大的開環增益，相對低的失調等性能，電流傳輸器的輸入級和跨阻放大器中運算放大器輸入級均採用折疊共源共柵放大器。
  7. In the frequency range of 1hz to 600mhz, the worst power supply rejection ratio ( psrr ) is about ? 20. 7db

    在1hz 600mhz的頻率范圍內，最差情況下的電源抑制比為- 20 . 7db 。
  8. Results from hspice simulation and foundation show that the band - gap voltage reference of ic is 3. 126v, has a psrr of 65db, an accuracy of 23ppm / in [ 0, 70 ], and the band - pass filter has an gain of 73db, whose band - pass frequency is 0. 1hz ~ 10hz. comparator ’ s window is 700mv. time sequence and functions of digital circuits are normal

    Hspice和foundation軟體模擬的結果顯示，帶隙基準電壓源為3 . 126v ，電源電壓抑制比為65db ，溫度系數為23ppm / ;帶通濾波放大部分增益為73db ，帶通頻率為0 . 1hz ~ 10hz ;雙限電壓比較器窗口為700mv ，功能良好，數字電路時序正確，功能正常。
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