電路單模 的英文怎麼說
中文拼音 [diànlùdānmó]
電路單模
英文
circuit module- 電 : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
- 路 : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
- 模 : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
- 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
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The new system consists of a single - chip computer system ( at89c51 + psd311 ) and alow power consumed analyzer by applying a new adc chip ads774, and a dead - time correcting circuit is designed to correct the collecting time
本系統由單片微機系統( at89c51 + psd311 )組成多道緩存,由低功耗模數轉換器組成分析器,與微型計算機通過列印并行介面實現數據通訊,並含有死時間校正電路。This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga
本課題主要針對星載并行計算機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究,提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術,提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案,實現該方案所需增加的電路少,可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。This paper discusses the designing and making of the dynamic testing systems of engine electronic control system. base on the construction and operation principle of santana 2000gsi m3. 8. 2 engine electronic control systems, design and manufacture led circuit of dynamic testing and fault imitating electronic control unit. on the inspect board, design and equip with motronic 3. 8. 2 ecu i / o measuring joints, design and set up obd - ii diagnostic communication link, design and install fuel pressure inspecting meter. depend on the obd - ii diagnostic communication link and ecu i / o measuring joints, this dynamic testing system can inspect engine electronic fuel injection system, distributorless ignition system, idle speed control system and evaporative emission control system, and can inspect m3. 8. 2 sensors, ecu and actuators, and can interrogate fault memory and erase fault memory ; and can analyse data stream ; and can carry out fault imitating. besides, this paper analyses sensors and actuators typical fault w aves
2電控單元電路連接器設計製成輸入輸出電子控制檢測端子,並在檢測面板上布置了obd -診斷插座和燃油壓力表。使該動態測試系統能實現對電噴發動機的燃油系統、直接點火系統、怠速控制系統和燃油蒸氣排放控制系統的動態檢測;並通過obd -診斷座、 ecu輸入輸出檢測端子和故障模擬處理單元實現對電噴發動機電控系統各傳感器、電控單元、執行器進行故障碼讀取與清除;動態數據讀取和波形測試和故障模擬等。此外,本論文還分析了傳感器和執行器典型故障波形。According to the application background and the dismatch between single antenna and differential lna, an active balun is needed and has been designed. then we put forward a design scheme that does co - simulation of an active balun and a differential lna on one chip together. at 2. 45ghz, this lna provides a forward gain of 28. 931db with a noise figure of 2. 485db, while drawing 19. 1ma from a 1. 8v supply
從本設計的應用背景出發,考慮到單端天線與差分lna之間的不匹配性,設計了一個介於兩者之間的有源平衡轉換電路? balun ( balance - unbalunce ) ,並提出了將這個balun電路與前面設計的差分lna作為一個整體進行了模擬的設計方案。This paper presents a method that chopping wave is done by switch devices which consist of three - level resistance regulating module and intelligence power module ipm, and which realizes constant - current discharge of storage battery. to achieve the intelligence control of the drive protection and the discharge process of ipm, the paper designs circuit formed by igbt threshold drive pulse pwm signals. ipm fault - blocking protection circuit and microcomputer 80c196. the devices can accurately control the 0 ~ 150a discharge current and the discharge time of the storage battery and calculate the releasing power
實現蓄電池恆流放電過程智能控制是蓄電池放電裝置發展的必然趨,本文提出了一種通過三極電阻調節模塊和由智能功率模塊ipm為開關器件進行斬波從而實現蓄電池恆流放電的方法。為達到對ipm的驅動保護和放電過程的智能控制,文中設計了igbt門極驅動脈沖pwm信號形成電路和ipm故障封鎖保護電路及由單片機80c196為核心的微機控制器。本裝置能夠對蓄電池進行0 150a放電電流及放電時間的精確控制及釋放容量的計算。This converter includes not only analog parts such as the bandgap voltage reference, voltage pump, sample / hold unit, one bit comparator of high precision, multiply - by - two and difference unit, but also digital parts such as register and multiplexer. so the design of this type of converter is mixed signal design
模數轉換器的內部電路包括基準源、降壓模塊、抽樣保持電路單元、高精度的1bit比較器、倍乘作差單元等模擬電路模塊,以及寄存器組、選擇器等數字電路模塊,屬于數模混合電路。This digital pattern generator composes of eight parts : interface circuit unit, dual - port sram unit, dsp unit, dac unit, expose / mark signal detection control unit, mark signal diction unit and final expose shape registers unit
本論文中的新型圖形發生器由介面電路、雙埠存儲電路、數字信號處理電路、數模轉換電路、曝光標記檢測控制電路、標記檢測電路、最終曝光數據寄存器單元和束閘控制電路構成。In the paper, based on the existing literature research foundation an analog circuit catastrophic fault location approach by using feedforward networks with back ? propagation learning is realized. by this approach, the simulation require ments before test are reduced because fewer training samples are needed, and the fault location process is fast. this method is very efficient in location of single hard fault wit component tolerances. the measureme nt space feature and the general characterization concept of single and double soft fault in linear circuits are presented. according to this concept, a linear circuits soft fault location approach using subhidden layer bpnn is established with element tolerance, and it is shown that this approach is successful in fault location. a double fault feature extraction.,
本文在現有文獻理論研究的基礎上實現了採用bp演算法前向多層神經網路對直流測試下模擬電路硬故障的診斷方法。其特點是採用少量典型特徵樣本作為bp網路的訓練樣本,獲得訓練樣本的代價小,減少了測前工作量,同時診斷速度快,在考慮元件容差時仍有好的診斷效果。文中介紹了線性電路單一軟故障和雙軟故障所具有的電壓增量空間特性和統一特徵概念。The chip can be widely used in mp3 player, pda, digital camera, cells phone and portable products etc. this thesis first introduces the basic theory of switching power supply. the operating theory of this circuit has been demonstrated. the operating principle and simulation analysis about band gap reference, self - biased current source, one shot circuit, hysteresis comparator, and current - limit circuit have been particularly expounded in this thesis
本文首先闡述了開關電源的工作原理,詳細介紹了本電路的整體工作原理,最後重點介紹了自偏置電流源電路、基準源電路、單穩態觸發器電路、峰值電流限制及低電池電壓遲滯比較器的工作原理,並利用eda工具larker ? ams 、 hspice對電路進行了完整的設計和模擬模擬,給出了合理的電路數據,各子模塊電路的電特性參數均達到或優于設計所需指標。It is widely used in many circuits, such as high precise comparators, a / d and d / a converters, drams, flash memory circuits, and other analog or mixed circuits. therefore, it is significant to develop a voltage reference circuitry that is compatible with digital cmos technology and can be integrated into a system on a chip ( soc )
基準電壓源( voltagereference )是超大規模集成電路和系統的重要組成部分,應用於高精度比較器、 a d和d a轉換器、隨機動態存取存儲器、閃存電路等多種電路和電路單元,亦為系統集成晶元( soc , systemonachip )所廣泛採用。Yueqing blue sky high science technologies co., ltd. established in 1999, it is one that specializes in single, three - phase electronic type meritorious electric energy meter, single, three - phase electronic type prepaid electric energy meter, single, three - phase electronic prepaid fee timesharing electric energy meter, active and reactive combination meter, multi - functional meter and circuit board module and smt processing, oem serve
樂清市藍天高科技有限公司創辦於1999年,是一家專業生產單、三相電子式有功電能表、單、三相電子式預付費電能表、單、三相電子式預付費分時電能表、有功無功組合表、復費率表、多功能表及電路板模塊和smt加工、 oem服務的企業。The whole circuit consists of a multiplier, an error amplifier, a comparator, a rs flip - flop, an and gate, and an inverter, etc. the electronic circuit simulator cadence is utilized to practice the detailed functional simulation of the general circuit and the subsystem circuits
整個電路由模擬乘法器、誤差放大器、比較器、 rs觸發器、與門和倒相器等基本單元電路組成,採用工作站上的大型ic設計軟體cadence進行模擬。In paper we designed the processing circuits of magnetic encoder, designed the magnified circuit, the signal collection circuit and the d / a conversion circuit are designed. then magnetic encoder can output two different type signals : digital signals and analog signals, the two type signals are corresponding
對磁編碼器的信號處理電路進行了設計,設計了磁頭的放大比較電路、單片機信號採集電路和d a轉換電路,設計了單片機信號採集和d a部分的程序,使編碼器能在輸出數字信號的同時輸出與數字信號一一對應的模擬信號。Thirdly, it gives a detail about the hardware and the circuit ( single - chip, communication interface circuit, sign input channel and analogous circuit )
第三,詳細闡述了系統的各硬體模塊電路(單片機系統、通信介面電路、信號輸入通道、模擬電源)組成。Method for linear circuits with element tolerances are also presented. by this method, the double fault general characterization can be calculated by single fault general characterization which can be calculated by single fault feature. this method makes simulation before test more simple. according to the actual project requirements, practical bp algorithm is presented and realized on personal computer. after further optimization and improvements, a subhidden layer bpnn algorithm which support unlimited units is realized
文中給出的線性電路單故障特徵可根據電路正常狀態下參數值來計算;給出的線性電路雙故障特徵可由元件的單故障特徵來獲得,簡化了測前模擬工作。根據實際項目的要求,在pc機上實現了實用的bp演算法。經過改進,實現了支持無限元的子隱層bp神經網路的核心演算法。The control circuit of the probe has been divided into four modules, namely, infrared led drive circuit module, monolithic processor control module, keys trigger module and data communication module
光學測棒硬體控制電路劃分為: led驅動電路、單片機控制、按鍵觸發和數據通信四個功能模塊。Present technology offers no cure for this problem, which also limits the performance possible from broadband monolithic mixed signal ics having analog and digital circuitry on a single chip
目前的工藝尚無法解決這個問題,同時這個問題也制約著寬帶單片混合信號電路(在一個晶元上同時存在數字電路和模擬電路)的技術進步。The current - sharing controller uc3907 is adopted to design the current - sharing circuit for power supply, it can realize parallel multi - module to compose power supply system much more huge than one module
採用均流控制晶元uc3907設計了電源的均流控制電路,使模塊單元具有可並聯功能,可以實現多電源模塊並聯組成更大功率的電源系統。We first propose and implement a sequential word - level pattern parallel fs algorithrn for synchionous sequential circuits. differing from other similar algorithins, it utilizes the relative independence of every fault test sequence generated by the g - f two - value tg algorithm, pwtitions and dynamically mounts test pattem, avoids redundant simulation for added synchlronous sequence, and gets better results
首先提出並實現了一個新的同步時序電路單機字級測試碼并行fs演算法,該演算法與現有同類方法的不同在於,利用確定性g - f二值tg演算法的每個故障測試序列之間的相對獨立性,對測試碼進行分解並動態組裝,避免了對添加的同步序列的冗餘模擬,效果較好。Some usual measurement methods are introduced, and their advantages and disadvantages are also analyzed in detail. in view of the defects of the usual methods and the latest developments in bi - photon effect, an all - fiber - measurement system for ultra short pulse was designed in this work, based on the knowledge of nonlinear fiber optics, application of passive optic apparatus, optic - electric transformation, analog circuit, micro chip unit ( mcu ) and so on
針對常用方法的不足,結合近些年來雙光子效應的研究成果,我們採用雙光子探測器取代常用的非線性晶體,並首次利用光纖延遲取代空間光路延遲,綜合了非線性光纖光學、光無源器件的應用、光電轉換、模擬電路、單片機等知識,設計出了一套全光纖超短脈沖測量系統。分享友人