頻分電路 的英文怎麼說

中文拼音 [bīnfēndiàn]
頻分電路 英文
frequency sharing circuit
  • : Ⅰ形容詞(次數多) frequent Ⅱ副詞(屢次) frequently; repeatedly Ⅲ名詞1 [物理學] (物體每秒鐘振動...
  • : 分Ⅰ名詞1. (成分) component 2. (職責和權利的限度) what is within one's duty or rights Ⅱ同 「份」Ⅲ動詞[書面語] (料想) judge
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. In designing analogic circuit, we adopt programmable filter max262 to meet the system ' s command. after the step, we can make the signal ' s frequency width is wider and noise level is lower. to make the signal ' s amplitude to meet the analogic to digital device ' s command, we adopt the max551 to finish the gain control

    在模擬,採用可編程濾波器max262 ,這樣就滿足了該數據採集裝置所採集的信號的率范圍較寬以及具有較低的噪聲水平的要求,為了使采樣到的信號的幅度滿足後面a d轉換器的要求,採用max551對采樣到的信號進行調理(增益控制) 。
  2. On the demand of application and according to the soluhons menhoned above, a method of displacement waiting auto - sy ' nchronizing is put forward, which is based on match filters. at the end a complete and speeflc set of hardware circuits and software programs which haplements the scheme, is also presented in the ancle. the synchronization system was tested in the pool and in the shallow wate near m port, the result of the test shows that its performance is satisfactory

    論文著重介紹實現了跳通信系統同步的一般方法,並詳細析和對比跳同步系統的捕獲方案,在此基礎上,提出了一個基於匹配濾波器的位移等待式自同步方案,設計、完成並給出了詳細硬體連線圖、軟體程序流程圖和部程序清單,該自同步方法在實驗室水池實驗取得良好的效果,並在廈門港海域進行了現場實驗測試,具有較低的誤碼率和一定的檢測概率,結果令人滿意。
  3. This paper refers to several creation in compatibility with large volume of fed display and conversion of different video signal. it firstly used special central chip al300, designed correlative circuits, successfully developed vga full - color fed console system, compatible with resolution 1280 1024, achieved functions such as multi - video signal conversion and interleaving, met vga ’ s resolution of fed. it firstly designed and fabricated vga interface and separated video interface - - s - video, converting several video signals to 24 bits full - colored digital image signal in fed driving system, achieved separation of luminance signal and chromatism signal, enhanced the bandwidth of luminance signal

    首次採用平板顯示專用控制晶元al300 ,設計並製作了相關配套,支持的最高解析度是1280 1024 ,實現解隔行和多種視格式轉換的功能,滿足了fed顯示屏對vga解析度的要求。首次在基於fpga的vga級彩色fed控制系統中設計並製作了vga介面和視信號s - video介面,可以將多種視信號變換為fed驅動系統可用的24位彩色數字圖像信號,實現亮度信號和色差信號的離,提高了亮度信號的帶寬。
  4. Contrapose to the instability of the third - order charge - pump pll system, the loop optimization method is employed in system level design to decide the bandwidth and phase margin, therefore the loop bandwidth locates at the maximum phase margin to guarantee the stability of the system. according to tsmc 0. 35 m sige bicmos model, the sub - circuits in the designed pll and the whole system are simulated and verified by the cadence spectre

    5 .根據tsmc0 . 35 msigebicmos工藝模型,利用cadencespectre模擬軟體對所設計的荷泵鎖相環中各個模塊及整個系統進行了模擬模擬,模擬結果顯示,在1 . 5v壓下,率為200mhz的參考輸入信號,輸出中心率為800mhz ,採用4,環帶寬為10mhz ,捕獲時間大約為0 . 92 s ,功耗大約為15mw ,達到了設計指標。
  5. In the next place, by studying the change of the resonant frequency of the whole system, this paper designs the circuit to track the resonant frequency of the system by cd4046 mainly. at the same time, in order to improve the efficiency and get better dynamic capability of the converter, we choose pll and fuzzy control after comparing the pll circuit, fuzzy circuit and pll ? fuzzy control circuit. in the end, this paper brings forward the control blue print to realize the drive control circuit of the high frequency converter, using the dsp chip as the key part to realize four routes of pwm drive pulses with dead band of the control system

    其次,通過對整個系統諧振率變化的析和研究,設計了以鎖相環cd4046為核心的鎖相環控制,同時,在綜合比較鎖相環控制、模糊控制以及模糊控制和鎖相環復合控制三種控制演算法的基礎上,進行了系統模擬,得出採用復合控制可使跟蹤既具有鎖相環較好的穩態性能,又擁有模糊控制較好的動態性能,系統魯棒性能好,同時也提高了逆變器的效率。
  6. Analysed the frequence compensation and noise response of the op amps extent

    率補償和噪聲性能進行了一定的析。
  7. This paper starts the research of the liquid floated pendulous accelerometer testing system according to the engineering. at first, this paper gives the brief introduction of the history and present status of accelerometer and its testing technology, the working principium and math model of the liquid floated pendu - lous accelerometer, and then, decides the binary width pulse force retrim loop as the design proposal of testing system, researches the transfer function of every part in the system emphasizly, analyses the stability of the whole accelerometer testing system from the angle of control theoretics by the open loop transfer function of system, and designed the correcting net, analyses the basal problems such as resolution, sampling restraint, precision and so on, designs the hardware testing circuits such as preamplification, band - pass filter, alternating amplifier, phase sensitive demodulatorn, pulse - width modulation, frequency scale circuit, moment current generator. finally, using the graphics program language labv - iew which is designed for testing field especially by ni accomplishes the solfware design of testing system, realized the testing functions

    首先對加速度計及其測試技術的發展歷史和現狀,液浮擺式加速度計的工作原理和數學模型等作了簡要的介紹,然後確定了以二元調寬脈沖再平衡測試迴為設計方案,並從控制理論的角度進行了析,著重研究了系統中各部的傳遞函數,利用系統開環傳遞函數析了系統的穩定性,同時設計了系統的校正網;析了二元調寬脈沖再平衡測試迴的解析度、采樣約束以及測試精度等基本問題,並按照系統析的結果設計了包括前置放大、帶通濾波、交流放大、相敏解調、脈寬調制、以及力矩流發生器等測試系統各部硬體,驗證了的正確性,最後按照測試系統的要求,採用了美國ni公司專為測試領域所開發的虛擬儀器工具? ? labview作為測試軟體開發工具,利用該圖形化編程語言完成了測試系統軟體部的設計,實現了測試功能。
  8. In the active circuit part, based on the theories of multiplier of srd and fet, we have designed the circuit of x band 6 multiplier and ka band tripler. then they are simulated and optimized using harmonic balance method. furthermore, the results of optimization and experiments are analyzed

    在有源,我們介紹了階躍管、 fet倍器的基本原理,在此基礎上別設計了兩個倍,然後利用諧波平衡法進行了模擬,並對模擬、測試結果作出了比較。
  9. Critical circuits in developing this board, such as tht modulation circuit, demodulation circuit, pll and filter, were analyzed in detail. parameters adopted in these circuits were also calculated. based on all that mentioned above, a rf board was implemented and related tests and experiments were successfully done as well

    本文主要對cdpd移動終端數據機的硬體開發中的關鍵部?高進行了研究,論文在cdpdv1 . 1規范的基礎上,提出了射的實現方案,選擇了合適的核心晶元,並對中的調制解調、鎖相環、濾波器等關鍵模塊進行了較為詳細的析,對中的有關參數進行了計算。
  10. After analyzing the noise in the high frequency carrier channel and computing the parameter of channel, we solved the kernel problems of coupling and matched impedance. separate designing the power, power amplification, port, transceiver and other circuits, we fitted together all circuits become the whole lonworks node circuit, and then triumphantly debugged it

    經過對高載波通道的干擾特性析和線參數的計算,解決了耦合和阻抗匹配等核心問題,並對源、功放、介面、收發器等部別設計,最後形成了完整的lonworks節點硬體,並調試成功。
  11. And pays emphasis on analyzing the system structure and system flow, the core techniques, the channel characteristic and parameters of dvb - t system. the system adopts some core techniques such as cofdm, a lot of tps ( transmission parameter signalling ) insert and guard interval, and so on. so it can withstand high - level ( up to odb ), long delay static and dynamic multipath distortion

    論文首先描述了數字視地面廣播的需求條件,技術難點和目前存在的問題,並重點析了dvb - t系統結構流程,核心技術及系統通道特性和參數,該系統採用了cofdm (編碼正交復用) ,大量導信號插入和保護間隔技術等核心技術,使之能抵抗高平( 0db ) ,長延時的靜態和動態多徑失真,有利於數字和模擬視的混合傳輸,它的多載波調制模式功能和性能在移動和便攜接收、同網等方面具有獨特的優勢。
  12. Then the paper designed for cable modem frame by using a kind of top grade special cpu and an asic, when analyzing the hardware architecture, and finally formed the entire hardware system by integrating flash, dram, eprom, and e2prom memories, ethernet, rs232 interfaces, and high frequency circuit

    然後析了硬體環境,論文中給出了利用一種高檔專用cpu和一塊超大規模asic為基礎設計出cablemodem的框圖。然後加上flash 、 dram 、 eprom 、 e2prom存儲器,以太網、 rs232介面,以及高,最後形成cablemodem的完整硬體系統。
  13. According to the test conditions, the double polarity inputting mode is adopted in the circuit of voltage - frequency converting part ; storage batteries are used in the optical emission part of optical fibre isolating and transmitting device, that can guarantee isolation between the main circuit and the testing system ; the 89c51 singlechip is used in the singlechip testing - controlling unit, the peripheral circuits are extended, data are transmitted through the serial port in this part ; the p opular software delphi5. 0 is used in the pc part, the communication between singlechip and pc by serial port, plotting of current wave, regulation of data ; the optical - electrical isolating and triggering are used in the controlling part, this can guarantee the veracity and reliability of breakers triggered, this triggering mode is also used in the triggering of the main closing breaker, the tested breaker and the assistant breaker, the triggering signals are sent out by a singlechip

    轉換部中根據實際情況採用了雙極性輸入方式;光纖隔離傳輸裝置的光發射部源採用了蓄池供,確保了主迴與測試迴的完全隔離;單片機測控部採用了89c51單片機,擴充了外圍,通過串口向pc機傳送數據; pc機與單片機之間的串口通訊、波形繪制、數據管理等都採用了軟體delphi5 . 0編寫。該測試系統中預留了輸出口,可以對合成迴中的主合閘開關、被試開關、輔助開關進行觸發,信號由單片機發出,控制部採用了光耦合隔離觸發的方法。軟體設計主要集中在對流信號的數據採集、數據處理、數據傳送、人機界面、波形繪制和數據管理,軟體部又可為單片機和pc機程序設計兩大部
  14. Methods of measurement for radio equipment used in satellite earth stations - part 3 : methods of measurement for combinations of sub - systems - section three - measurements for f. d. m. transmission

    衛星通信地球站無線設備測量方法第3部:系統組合測量第3節:復用傳輸的測量
  15. It consists of two parts : channel modulator ' s controlling system and the receiver ' s controlling system, including the interface designing of the demultiplexer, the controlling of the channel demultiplexer, if modulator, tuner, the setting and transmitting of the system parameters, and the real - time monitoring of the whole system, etc. based on the descriptions of the scheme of bdb - t and the principles of controlling circuits, this paper presents the hardware and software designing methods of the controlling circuits, and realizes a powerful, multifunctional and reliable controlling system which can automatically record the operational states of the system and communicate with other personal computers through a rs - 232 serial interface

    控制系統是實現整個傳輸系統的關鍵部,它為通道調制器控制系統和接收機控制系統兩大部,其中包括了通道解復用器用戶介面設計、對通道解復用器的控制、系統傳輸參數的設置與傳送、中調制器的配置、數字調諧器的配置,以及對整個系統的實時監控。本文在闡述了bdb - t方案及其各部的控制原理的基礎上,詳細描述了控制系統的硬體設計和軟體實現方法,實現了一套功能完善、性能穩定且具有自動記憶功能的控制系統,同時該系統通過rs - 232串列介面可以實現與計算機的串口通信。
  16. The first chapter, introduce the rf receiver ’ s devolop and current situation. the second chapter, introduce the effect of the exterior environment to the rf receiver. the third chapter introduce some different structure and the design parameters of each structures. the parameters of the rf receiver are introduce in fourth chapter. the fifth chapter design a s band rf receiver. this s band rf receiver use a structure of superheterodyne module

    第五章,介紹了一種s波段射接收前端的設計,基於析的結果對一種射接收機的低噪放大、下變、鎖相環( pll )率合成器、中agc進行了設計,並在第六章完成了接收機各組件及總體的測試。
  17. The analysis of harmonic balance and transpositional matrix is used to get the formula of conversion loss in the later according to equivalent circuit design the whole circuit

    詳細介紹了二極體的混原理,以及常見的二極體混的實現形式。採用諧波平衡析方法和變換矩陣析方法,推導出平衡混器變損耗公式。
  18. After having analyzed the theory of the calculator circuit thoroughly, the author made use of the characteristic of the calendar circuit and put forward a new design method, namely replacing the static circuit with the dynamic circuit to reduce the area of whole chip. now the author has finished the design of the calendar circuit and accomplished the layout design with the full - custom method

    本文作者在透徹析計算器原理的基礎上,利用萬年歷的工作率的特點,提出了以cmos動態門代替靜態觸發器的設計方法,獨立設計出萬年歷部,將其與計算器部緊密融合,構成一塊完整的數字大規模集成,並以全定製的方法實現了整個晶元的版圖設計。
  19. The major contents of this part is composed of the basic principle of the if circuit, the affection of the noise performance of the preamplifier to the whole system, the main constitutes of the receiver and their test results and the modulation circuit of the vco, etc. the test result shows that the performance of these circuits is fairly good

    內容涉及:中的基本原理及指標,前置放大的噪聲性能對整個系統性能的影響,接收機的主要組成部(前置放大、 agc放大)的基本原理、實現方法、測試結果及析和vco的調制信號產生的實現及測試結果。與前端聯調結果表明該部性能良好。
  20. This system is realized by cpld which can get rid of the disadvantages in one - time design including property liable to jamming, long sampling period, and poor working stability. its sampling period is up to 500ns at least and output delay is only 19. 5ns. a stable period of pulse coming out of quadruple - frequency differential circle belongs to it

    完成了用vhdl硬體描述語言對全數字轉速位置測量子系統的設計,並用max ? plusii軟體進行了編譯和波形模擬,在cpld ( max7000 )得到實現,該系統克服以往設計中存在的易受干擾、工作穩定性差、采樣周期太長等的缺點,輸出延時僅為19 . 5ns ,采樣最低周期可達到500ns ,且四倍獲得的脈沖周期穩定。
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