高速數字計數器 的英文怎麼說

中文拼音 [gāosùshǔzìjìshǔqì]
高速數字計數器 英文
high-speed numerical counter
  • 高 : Ⅰ形容詞1 （從下向上距離大; 離地面遠） tall; high 2 （在一般標準或平均程度之上; 等級在上的） above...
  • 速 : Ⅰ形容詞（迅速; 快） fast; rapid; quick; speedy Ⅱ名詞1 （速度） speed; velocity 2 （姓氏） a surna...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 高速 : （高速度） high speed; high velocity （hv）; high rate; swift; fast; express; high-speed
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  • 計數 : count; tally; counting計數卡 numbered card
  1. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  2. The high - speed digital signal processor is adopted and the real - time and reliability are improved greatly. the system with low - loss and high - efficiency is suitable for solar powered unmanned engine

    該系統採用高速數字信號處理器全數字化設計，其實時性好、可靠性高，並具有功耗低，效率高等特點，比較適合應用於太陽能無人飛機。
  3. With the rapid development of information technology, all kinds of portable electronic products and personal digital assistants are coming forth, the information source of these products partly roots in newspapers and journals, if the literal data could be acquired in optical scan mode instead of traditional keyboard input mode, human hands will be further liberated. on the other hand, the digital signal processor ( dsp ) specially designed for high - speed digital signal processing is playing an important role in the digital field, and the dsp with high processing speed and excellent operation performance is particularly adapted to image processing and character recognition. in consequence of this status, making use of new technology, this thesis researches into miniature intelligent reading system based on dsp and then presents a system solution of it

    隨著信息化技術的飛速發展，各種便攜式電子產品和個人助理不斷涌現，這類產品的信息來源有很大一部分都是報紙、書刊等文字資料，如果以文字的光掃描輸入取代傳統鍵盤輸入將會進一步解放人的雙手；同時專門為高速數字信息處理而設計的數字信號處理器（ dsp ）也成為數字化領域的重要角色， dsp的高速度和良好的運算性能特別適合於圖像處理和文字識別。
  4. Along with the improvement of rlg and accelerometer and the coming forth of high speed digital processor, the key technique of sins is carried out

    隨著激光陀螺和加速度計性能的不斷提高，以及高速數字處理器的不斷涌現，捷聯慣導系統實現的技術關鍵已經實現。
  5. This dissertation is focused on the theory of intelligent control and control system design for srm. firstly, this thesis analyzes pwm control method of srm and its convert circuit characteristics, and designed the control system based on tms320f240 dsp controller

    在介紹了sr電機及其控制系統設計研究的發展和現狀之後，本文首先分析了srm的pwm控制方式以及兩相斬波式主電路特性，並基於高速數字信號處理器（ dsps ）在電機控制方面的優勢，設計出基於tms320f240的srd實驗系統。
  6. It is easily digital realization and fulfil higher power factory. to testify the correctness, the control scheme is simulated using the dynamic simulated tool simulink of matlab 5

    本文設計了一個基於高速數字信號處理器（ dsp ）的功率因數整流器系統的硬體平臺，給出了系統軟體設計的詳細流程圖。
  7. In the hardware design, the analog circuit, high - speed a / d convertor, storage control logic and vxibus interface are discussed. the results of the simulation and analysis of the circuits are given

    在模塊的硬體電路設計部分中，著重對信號調理電路、高速a / d轉換器、高速存儲邏輯控制以及vxi總線介面等內容進行了討論，給出了具體的電路設計和關鍵器件的說明，並對部分模擬電路和數字電路進行了模擬分析。
  8. 2. the design of low - level driver of powerpc 405. after thoroughly collecting and consulting the latest information in the field of sopc, in this thesis we choose fpga embedded powerpc405 processor hardcore to construct the demanded sopc system, which manages to meet the application demand between

    論文課題在認真深入地調研了國內外sopc領域的最新資料后，選擇了嵌入powerpc405處理器硬核的fpga片上可編程系統，解決vxi介面與本地ram控制器的通訊和靜態存儲器存儲控制等方面的應用需求，通過powerpc硬體設計和底層驅動軟體編程，構建了滿足設計需求的高速數字測試系統。
  9. A design ot portable digital oscillograph based on dsp is presented. a integrated prototype is composed of high speed data processing module by which signal is digitalized, data processing unit whose core is dsp, general controller as which cpld is used and terminal facility - - lcd

    通過高速數據採集模塊將信號數字化，以高性能數字信號處理器tms320vc5402為核心構成數據處理單元，採用高密度的可編程邏輯器件epf6016a設計儀器的系統控制單元，使用液晶顯示器做為終端顯示設備，構成一個完整的示波表樣機。
  10. A vlsi very large scale integration architecture is also proposed to implement the improved motion estimation algorithm. experimental results show that this algorithm - hardware co - design gives better tradeoff of gate - count and throughput than the existing ones and is a proper solution for the variable block size motion estimation in avs

    考慮到avs主要面向圖像尺寸較大的高清數字電視壓縮，這種高復雜度的運算已經超過了現有通用處理器的運算能力，因此有必要設計專門的快速演算法和與這種演算法相匹配的硬體加速器。
  11. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上，通過對原模塊缺陷的分析，採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度，將原模塊中的所有數字電路全部集成在fpga晶元中，這樣不僅能節約成本，還能提高電路的可靠性和測量精度;採用高速的數字信號處理器（ dsp ）取代原有的單片機作為協處理器，來接收vxi發來的各種命令，分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號，能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平，該比較電平值能夠根據實際需求進行設置，能增強模塊的使用靈活性。
  12. The digital correlators of the two structures are designed with the foundation series 3. 1 xlinx design tools software. the classical structure emphasizes on the design of the adder, whose general form and 3 - 2 compressor structure are designed and analyzed. in this system, an express addition method is put forward, and its synthesis performance proves that it is superior to the two structures mentioned above

    文中利用xilinx公司的foundationseries軟體，詳細設計了兩種結構的數字相關器，經典結構的數字相關器以加法器的設計為重點，設計並模擬了一般結構和3 - 2壓縮結構的加法器，針對本系統文中還提出了一種快速計算加法的設計思想，綜合后比前兩種結構在性能上有明顯的提高；修正結構的數字相關器是基於模塊化的思想設計實現的，並以一個碼元的不同延時點為例，詳細分析了相關器的性能。
  13. This paper detailedly describes the design principle and method of the instrument driver, and puts emphasis on design thought and flow design and implement method. the file transport protocol is a important point in this part

    本文詳細介紹了儀器驅動器的設計原理和方法，並重點介紹了高速數字測試模塊儀器驅動器的設計思路、流程設計和實現方法，對自行設計的文件傳輸協議進行了介紹和分析。
  14. This paper discusses the hardware system architecture of broadband software radio experiment platform, designs hardware circuit system, studies the basic theory of software radio deeply, establishes the mathematical model. the platform is made up of a / d ( ad6640 12bit 65 msps ), orthogonality transform, digital filtering and dsp, etc. the platform can demodulate pcm - am / fm / pm / ask / fsk / psk / qpsk, pcm - cdma - psk, pcm - qpsk signal

    本文論述了寬帶軟體無線電接收實驗平臺硬體系統的體系結構，設計了硬體電路系統，深入研究了軟體無線電的基本理論，建立了接收實驗平臺的數學模型。該平臺由高速a d變換器（ ad664012位65msps ） 、正交變換、數字濾波器、 dsp等部分構成。實現了pcm - am fm pm ask fsk psk qpsk ， pcm - cdma - psk qpsk調制方式的解調功能。
  15. This work comes from the project " high speed data generator ", which is taken on by the university of electronic science and technology of china. this dissertation describes the design of the data generator, which includes data loading circuit, high speed data generating circuit and so on. it also analyzes some key techniques about its development and gives solutions of the high speed data generator

    結合電子科技大學承擔的項目「高速數字信號發生器」 ，本文圍繞「高速數據產生」這一課題展開研究，闡述了數據產生中的數據裝載、高速信號的獲得；分析了研製高速數據發生器所需攻克的關鍵技術，提出了技術解決途徑；並給出了高速數據產生的硬體設計方案，並對電路進行了製作和調試；對調試中出現的問題，進行了較深入的分析，提出了實際的解決措施。
  16. This dissertation brings forward a new method of modeling and simulation on interconnect ? fem - vfm, which combines finite element method with vector fitting method. we can get the scatter / admittance / impedance ( s / y / z ) parameter by fem in frequence domain, gain the equivalent spice circuits of interconnect structure by vfm, and extract the circuit ’ s parameters which are used to analyze in time domain. this method lets the simulation not only contain the information of pcb ’ s structure but also have a sustainable computing speed

    首先通過電磁場數值分析方法?有限元法（ fem ）對互連結構進行模擬分析，而得到的散射/導納/阻抗矩陣參數（ s / y / z矩陣參數） ，然後通過矢量擬合方法（ vfm ）把s / y / z矩陣參數轉化為等效spice等效電路模型，並且提取出電路參數，完成了頻域到時域的轉換，最後使用電路模擬器進行時域模擬，從而開發出了一系列高速數字pcb板設計規則。
  17. Then, the archetypal control system is designed, which measures up manufacture demands. the system takes plc as the processing center and makes use of plc ' s pulse export function to realize the orientation controls of high - speed and precision

    然後以可編程序控制器為核心，利用其脈沖輸出功能實現鑰匙加工機床中高速高精度數字定位控制，設計出了符合加工生產要求的原型機。
  18. This paper introduces algorithms and realizations on digital signal process technology in high - speed digital storage oscilloscope

    本文介紹了高速數字存儲示波器中的數字信號濾波和內插程序的設計及實現。
  19. In control system, system identification and control are calculated by a high speed digital signal processing unit

    實時控制中，辨識和控制的計算都由高速數字信號處理器完成。
  20. This high speed digital test module is based on the vxi bus structure and specified on multi - channel and high speed aspects ; it is also capable of generating the stimulant signal and collecting the responded data ; meanwhile because the relationship between stimulation and response can be programmable, the module is highly intellective and it helps the testing system work more automatically ; what ' s more, with the good functions like real - time comparison, branch, single step, pause, trigger, it makes the testing more efficient as well

    本實驗室設計實現了高速數字測試模塊，該模塊是採用vxi總線結構的儀器，具備以下功能:多通道，高速度;同時具備產生激勵信號和採集響應數據的能力;能夠通過編程在激勵和響應之間建立起因果聯系，使整個測試過程體現出一定的智能性，大大提高測試系統的自動化程度;具有實時比較，實時跳轉，單步，暫停，觸發等功能，使測試過程更加快速和靈活。
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