高速數據通信 的英文怎麼說
中文拼音 [gāosùshǔjùtōngxìn]
高速數據通信
英文
hsdc high speed data communication- 高 : Ⅰ形容詞1 (從下向上距離大; 離地面遠) tall; high 2 (在一般標準或平均程度之上; 等級在上的) above...
- 速 : Ⅰ形容詞(迅速; 快) fast; rapid; quick; speedy Ⅱ名詞1 (速度) speed; velocity 2 (姓氏) a surna...
- 數 : 數副詞(屢次) frequently; repeatedly
- 據 : 據Ⅰ動詞1 (占據) occupy; seize 2 (憑借; 依靠) rely on; depend on Ⅱ介詞(按照; 依據) according...
- 通 : 通量詞(用於動作)
- 高速 : (高速度) high speed; high velocity (hv); high rate; swift; fast; express; high-speed
- 數據 : data; record; information
- 通信 : communication; communicate by letter; correspond
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Digital intermediate frequency system is one of the hotspots in radio communication and military research, it provided a superexcellent way for high - speed double direction digital communication
數字中頻系統是當前軍事與移動通信領域的研究熱點之一,它為高速雙向無線數據通信提供了思路與方案[ 1 ] 。Utp cat5e high - speed data communication lan cable
超五類高速數據通信The videos, voices, data combined traffic and high speed data are becoming more and more predominent in the future, and how to efficiently transfer this multi - medium integrated - data is one of the researcher ' s interesting field. the cdma system, which has striking advantages of anti - multipath fading, soft capacities and large capacities over fdma and tdma systems, has been focused by all of the countries
未來信息社會中,圖象,話音,數據相結合的多媒體業務和高速數據業務量越來越佔主要地位,如何有效地傳輸這種多媒體數據,已經成為移動通信中的研究熱點之一。擴頻技術由於具有抗多徑,軟容量和時分多址與頻分多址更大的容量和優勢,而受到各國研究者的重視。For wireless communications, direct sequence code division multiple access ( ds - cdma ) techniques have received a great deal of attention due to the expectation of capacity increase, interference rejection capability, security, and so on. in a high data rate application such as multimedia services, however, the capacity of ds - cdma systems is limited by both the inter - chip, or inter - symbol interference
Cdma技術以其高抗干擾能力、高容量、高保密性等技術優勢在第三代移動通信系統中被廣泛應用,然而在高速數據業務中,嚴重的碼間干擾和符號間干擾會導致系統性能明顯下降。In the following chapters, a 16 - channel experimental phased array ultrasonic testing system is thoroughly explained, including digital beam forming, low noise programmable amplification of received ultrasound signal, multi - channel hi - speed hi - precision data acquisition, hi - speed real - time processing of multi - channel ultrasound signal, and hi - speed data transfer based on pci bus. in addition, the frame of software system is built
本文詳細闡述了作者所獨立研製的16通道相控陣超聲檢測實驗系統,包括數字化超聲發射/接收波束形成、超聲信號的低噪聲程式控制放大、多通道高速高精度數據採集、多通道超聲信號高速實時處理、基於pci總線的高速數據傳輸等全部電路模塊的結構及工作原理,並說明了所編寫的底層軟體系統的框架。In the hardware solution, a dual - port high speed communication card was designed to resolve the " data " losing " problem in the communication between the lrf and pc
在數據輸入模塊中還介紹了作者為解決兩個激光測距雷達和pc機之間的高速數據通信問題所設計的高速數據通信卡。The tramsission rate exceed to the range of isa bus, moreovcr the pci bus can be competent for the rate request. the card makes use of the total line in pcicontroller, the slice of fifo, fpga and super - speed a data correspondence chip, which can solve the transmission stream and total line in pci connecting problem. and realizes the mpeg - 2 deliver to flow with establish outside delivers
此速率超過了isa總線所能支持的傳送速率,而pci總線能夠勝任這一要求,由此確定節目傳輸流發送卡採用pci總線。此卡利用pci總線控制器、 fifo晶元、 fpga晶元、高速串列數據通信發送晶元,解決傳輸流與pci總線之間的介面問題,實現了mpeg - 2傳輸流與外設的高速數據傳輸。The measurement system consist of computer, 16 - channel high speed data acquisition board, spark plug pressure sensor, crank angle signal generator, charge amplifier and oscillograph. the max acquisition frequency of this system is 1mhz
由通用微機、 16通道無相差高速數據採集卡、火花塞式壓力傳感器、角標信號發生器、電荷放大器、示波器組成的高速數據採集系統,最高總采樣頻率為1mhz 。Because of the safety ' s request of the super - speed station ' s application, the super - speed station should hold the radio silence state when it has n ' t the task of data communication, therefore when the super - speed station is working it has two kinds of statuses : communication state and radio silence state
由於高速電臺應用安全的要求,需要高速電臺在無數據通信任務的時候保持無線電靜默,因此高速電臺工作時有兩種狀態:數傳狀態和靜默狀態。Application of ofdm in distribution network high - speed data communication
在配電網高速數據通信中的應用The inplementation of high speed data communication between dsp and serial interface of pc
機串口的高速數據通信的實現A lot of arq schemes have come into being, and they have different characteristics in terms of com - plexity and throughput
當前harq中存在的主要問題是復雜度過高,這對高速數據通信極為不利。This link may be a high - speed data communication circuit, a local area network ( lan ), a telephone live or a radio channel
這種連接的鏈路可以是高速數據通信電路、局域網( lan ) 、電話線路或無線通道。The high - speed data communication based on pci bus between the two pcs is discussed in two aspects ( hardware and software ) in the paper
本文從硬體和軟體兩個方面對基於pci總線的pc機高速數據通信進行了研究。However, the power line has largely been dismissed as being too noisy and unpredictable to be useful as a practical high - speed communication channel
然而,電力線由於其自身的噪聲嚴重和不可預測的特點,而很少作為高速數據通信通道。Beijing senrunda century information technology ltd. over the years engaged in professional high - speed data communications product development, production and marketing
北京森潤達世紀信息技術有限公司,多年來專業從事高速數據通信產品的研發生產市場銷售。Tpc has nearly the same performance as turbo code, especially simpler decoding method. so, it becomes the focus of the coding area, and will be widely applied in high speed communication
Turbo乘積碼的性能與turbo碼相近,譯碼方法比turbo碼簡單,因此也成為編解碼領域近幾年來研究的熱點,在高速數據通信中有很廣闊的應用前景。The test results demonstrated the feasible of the scheme. the technique researched in this paper will largely simplify the equipment of modulation and demodulation, and may find its application in millimeter wave in high - speed data communication link
與中頻調制方案和一般直接射頻調制方案相比,本文所採用的技術大大簡化了調制/解調設備,同時保持了優良的性能,對毫米波高速數據通信鏈路應用具有較大的優越性和廣闊的前景。Design of logic control circuits, device driver and application of the high - speed data communication system based on pci bus are completed. with s5933 bus master ( dma ), bidirectional and high - speed data transmission are realized
本文完成了基於pci總線的雙機高速數據通信系統的邏輯控制電路設計、驅動程序及應用程序的開發,實現了s5933總線主控( dma )方式的雙向高速數據傳輸功能。Fifo data channel of pci interface chip s5933 and approach of realizing pci bus master dma through the fifo is introduced in detail. the reason for choosing s5933 ' s fifo to transfer data at high speed is clarified. secondly, the design process of hardware is introduced
文中首先介紹了pci總線的協議,討論了pci介面的實現途徑,並詳細介紹了pci介面晶元s5933的fifo通道及其總線主控dma方式的實現方法,闡明了選用s5933的fifo通道進行高速數據通信的原因。分享友人