高速處理器 的英文怎麼說

中文拼音 [gāosùchǔlǐqì]
高速處理器 英文
high speed processor
  • 高 : Ⅰ形容詞1 （從下向上距離大; 離地面遠） tall; high 2 （在一般標準或平均程度之上; 等級在上的） above...
  • 速 : Ⅰ形容詞（迅速; 快） fast; rapid; quick; speedy Ⅱ名詞1 （速度） speed; velocity 2 （姓氏） a surna...
  • 處 : 處名詞1 （地方） place 2 （方面; 某一點） part; point 3 （機關或機關里一個部門） department; offi...
  • 理 : Ⅰ名詞1 （物質組織的條紋） texture; grain （in wood skin etc ） 2 （道理;事理） reason; logic; tru...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 高速 : （高速度） high speed; high velocity （hv）; high rate; swift; fast; express; high-speed
  1. The software radio consists of several parts as follow : analog front end, broadband a / d and d / a, digital upper / down converter, high - speed signal processor and so on

    它由以下幾個部分組成:模擬前端，寬帶a / d和d / a ，數字上/下變頻器，高速數字信號處理器等。
  2. Pc with pentium 700 or faster processor

    配備pentium 700或更高速處理器的電腦
  3. Pre - reductor is first proposed to reduce nodes dramatically, therefore the solving ability is enhanced and the speed of the solver is improved

    摘要提出了利用預處理器來提供強大的壓縮節點功能，大大提高了電源網格節點電壓求解器的求解能力和求解速度。
  4. At present, the typic harmful current detection methods are the fast fourier transform algorithm in frequency domain and methods based on the instantaneous reactive power theory, these methods all require some transform and quick, real - time calculating, so high precision analog multipliers or high speed dsp chip with fast a / d are needed, this results in complex circuit and high cost ， which have restricted the development of apf

    目前畸變電流檢測常用的方法有頻域法的fft和基於瞬時無功理論的畸變電流檢測法。這些方法均有一定的變換，需要快速、實時運算，因此必須使用高速的數字微處理器和高性能a / d轉換器，這必將大大提高系統成本，使得電路結構復雜，在一定程度上限制了有源濾波器的發展。
  5. On one hand, the focal point that the interface circuit is designed lies in lining up the arrangement of the aerial data, have adopted one pair of ports ram to cooperate with the counter and realize the lining up of the data, on the other hand, interface focal point that circuit design transmission of data, part this finish mainly and interface of linkport of dsp, make data transmisst to dsp processor at a high speed, go on follow - up punish

    一方面，介面電路設計的重點在於對天線數據的整理排隊，採用了雙埠ram配合計數器實現數據的排隊，另一方面，介面電路設計的重點是數據的傳輸，這部分主要完成和dsp的linkport的介面，使數據高速傳給dsp處理器，進行后續處理。這個項目按照自上而下的設計流程，從系統劃分、編寫代碼、 rtl模擬、綜合、布局布線，到fpga實現。
  6. Intelligent multi - channel data - logging display controller adopt advanced microprocessor for smart control, it is suitable for display and control temperature, humidity, pressure, liquid level, instantaneous flow, speed and so on in many physical quantity inspect signal, and can data - logging multi - channel measure signal. it also can carry on high - accuracy linear correction to various non - linear input signals

    雙迴路數字光柱顯示控制儀採用先進的微處理器進行智能控制，適用於溫度濕度壓力液位瞬時流量速度等多種物理量檢測信號的顯示及控制，並能對各種非線性輸入信號進行高精度的線性校正。
  7. Vmebus boards have data bus sizes of 16, 32, or 64 bits and are designed to be plugged into a backplane that has up to 21 slots for other boards. these other boards can ben cpu boards or peripheral boards providing various functions. the vmebus standard originated with the motorola versabus in 1979 which was designed using the then new mc68000 microprocessor

    性能的提高主要是由於三個方面的改進： 1 .處理器及高速緩存性能的優化2 .降低內存瓶頸：通過對powerplus體系結構的改進，使內存性能提高到582mb s memory read bandwidth和640mb s burst write bandwidth 3 .系統總線吞吐率的優化：其他的晶元組對pci到內存帶寬只能到70mb s ， powerplus ii則能達到80mb s而無須消耗額外的cpu資源。
  8. The laser unit, because of its monochromaticity and small divergency, is used as sensor ’ s light source. devices and chips provided with high - speed responsing and processing capabilities are employed. as a result, the achieved uncertainty of time measuring is 125 ps, demonstrating an accuracy improvement in magnitude of an order

    在設計製作中採用了單色性和方向性好的激光作為光源，選取了高速響應和有高速處理能力的一系列器件、晶元，因此時間測量的精度達到了125ps ，比以往的測試方法提高了1個數量級以上，速度測量精度達到掃描速度的0 . 1 % 。
  9. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  10. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  11. For high stability of the system, with the realization of hardware of the system, the second part of this paper starts from the transmission line theory, and studies the signal integrity problem of high - speed circuit system in light current. the causes of these signal integrity problems, such as signal delay, reflection, crosstalk, ground bounce noises and etc. are analyzed in theory. combined with actual design, key points of design and standard design flow of general high - speed, high - precision printed circuit board are summarized, which has been applied in actual system, and good effect has been achieved

    為使系統具有較高的穩定性，本文第二部分結合該處理器的硬體實現，從傳輸線理論出發，研究了弱電情況下高速電路印刷電路板中的信號完整性問題；從理論上分析了延遲、反射、串擾以及地彈噪聲等信號完整性問題產生的原因；結合實際設計，總結了一般高速、高精度印刷電路板的設計要點和標準設計流程，並在實際系統中獲得了應用，取得了很好的效果。
  12. Different from general microprocessors, dsps have harvard architecture or enhanced harvard architecture and units of dsps can work in parallel. to perform multiplication in high speed, dsps also include hardware multiplier in its cpu

    與通用微處理器不同，數字信號處理器採用了哈佛總線結構或改進哈佛總線結構，具有高度的并行性，為了快速完成乘法計算在cpu中增設了硬體乘法單元。
  13. Efforts are concentrated on how to improve the performances of the synchronous and velocity sensor of high speed rotating mirror camera, creative ideas in this paper are displayed as follows. ( 1 ) high speed rotating mirror camera signal is processed by means of opto - electronic system. the advantages of the opto - electronic system, such as good emi resistance and fast processing ability, are employed to optimize the design

    本文的工作就是圍繞如何提高高速轉鏡相機同步與轉速傳感器的性能開展的，主要工作內容和創新點如下: （ 1 ）利用光電系統對高速轉鏡相機同步與速度傳感信號進行處理本文利用光電傳感系統的抗電磁干擾及可高速處理的特性，把高速旋轉狀態下反射鏡的時間參量轉換為光信號，再經過光探測器轉換為電信號。
  14. The designs of circuit and electro magnetic compatibility ( emc ) are very important for the high - speed disposal system and the design of high frequency printed circuit is more important. it is described in detail in this article ; for the mixed voltage system, the meet of different voltage chip is very important and it is also described in detail

    對于高速處理系統，電路設計和電磁兼容性（ emc ）的設計很重要，尤其是高頻布線要求更高，本文對此做了比較詳細的介紹;在混合電壓系統中，不同電源電壓器件的介面需進行電壓變換，本文對此也做了詳細的介紹。
  15. In compensation, the black hole is a much faster processor

    可資彌補的是，黑洞是個超高速處理器。
  16. Due to the scheme it also discusses the methods and standards how to choose the right devices used in this image process system. the main parameters and developing environments of these devices are listed, too

    並根據上述演算法，詳細的分析了選擇適當高速處理器件的方法及標準，介紹了一些主要器件的性能指標和相應開發環境。
  17. It is expected that the standard will be used for a wide range of bit rate, not just low bit rate applications and that h. 263 will replace h. 261 in many applications. to realize the real time video compression, a high performance processor is necessary

    視頻數據壓縮運算量大，需要大量的存儲空間，要實現實時的視頻數據壓縮無疑需要一個高速處理器， tms320c6711dsk是ti推出的面向圖像處理的硬體平臺，其運算速度可達到900mflops （百萬指令位元組每秒） ，可用內存達16m位元組，是進行視頻壓縮的理想平臺。
  18. The load - control apparatus adopted a single - chip microcomputer system, whose mcu was a kind of high - speed processor - ds80c320, whose a / d switched apparatus was max180, whose low - pass filter was max293, whose f / v transformed circuit was lm331, whose controlled silicon phase - shift touch - off circuit was tca785, and whose communicating interface of rs232 was max202. the watchdog of the mcu was max705 and the system used an on - off electrical source to supply power

    球磨機負荷控制儀採用了單片機系統， mcu採用ds80c320高速處理器，採用max180作為md轉換器，低通濾波器為max293 ， f v轉換電路利用lm331 ，可控硅移相觸發電路使用tca785 ， rs232通信介面晶元採用max202 ， mcu監控電路為max705 ，系統使用開關電源供電。
  19. Built - in high - performance single chip microcomputer and memory to guarantee high data speed processing and reliable preservation

    內置高性能單片機和存儲器，保證數據高速處理和可靠保存。
  20. In this paper, the principle and method that making use of complex programmable logic devices ( cpld ) to realize high accurate pwm controller are chiefly analyzed, and a new control method and amendatory strategy for the triple multi - level convector based on cpld is put forward. by carefully analyzing the triple multi - level power amplifier composed of four bridges converter bridge, the fact and idea that complex programmable logic devices ( cpld ) have high speed

    本文詳細討論分析了用可編程邏輯器件cpld實現高精度pwm控制器的原理和方法，並且提出了一種基於cpld器件的三進制多電平逆變器的控制方法和改進策略，針對具有四級逆變橋結構的三進制多電平功率放大器進行了具體的分析和驗證，證實了可編程邏輯器件內部高速處理的性能和在電力電子技術控制中的應用優勢。
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