高阻輸入 的英文怎麼說

中文拼音 [gāoshū]
高阻輸入 英文
high z in
  • : Ⅰ形容詞1 (從下向上距離大; 離地面遠) tall; high 2 (在一般標準或平均程度之上; 等級在上的) above...
  • : 動詞(阻擋; 阻礙) block; hinder; impede; obstruct
  • : Ⅰ動詞1 (運輸; 運送) transport; convey 2 [書面語] (捐獻) contribute money; donate 3 (失敗) l...
  • : Ⅰ動詞1 (進來或進去) enter 2 (參加) join; be admitted into; become a member of 3 (合乎) conf...
  • 高阻 : high resistance
  • 輸入 : 1 (從外部送到內部) import 2 [電學] input; entry; entering; in fan; fan in; 輸入變壓器 input tra...
  1. In this thesis, the author analyses the deficiency in detecting and controlling function of the computer detecting and controlling system utilized in present transforming station. the strategy of design of software on operation and direction of 5 00kv transformer station is presented. it points out that we can deduce the mathematic analytical formula using the current, voltage and power of two terminals of transmission line as input. on this basis, we do realtime calculation of 500kv transmission line ' s parameter. we can also deduce the linear analytical formula of three - winding autotransformer ' s resistence using its current, voltage and power as input. the corresponding software is programmed on this basis

    論文提出以電線路本端和對端電流、電壓、功率作為量,導出了超壓長線的波抗和傳播常數的數學解析式,在此基礎上進行了500kv電線路實時參數計算;提出以三繞組自耦變壓器的電流、電壓、功率為量,導出了自耦變壓器繞組的電、電抗的線性解析式並進而對變壓器的實時參數進行計算;在此基礎上編制了相應的軟體。
  2. To achieve the high impedance required specially designed "electrometer" vacuum tubes, field effect transistor must be used in the input stage.

    為適應抗需要,儀器電路中須用特殊設計的靜電計專用電子管、場效應晶體管。
  3. If the node is at, or near to, ground then a grounded guard ring will be appropriate, if it is at some other potential it may be necessary to use a high input impedance buffer amplifier, with its input connected to the node, to force the guard ring to the node potential

    如果被保護的節點的電位是(或接近)零電位,採用地線保護環最為合適;如果節點電位是其他值,那麼可以用抗放大器組成緩沖器,端連接該節點,出端連接保護環。
  4. Since the secondary winding is normally operated into a high-impedance circuit, the secondary current is quite small.

    因為次級繞組通常抗的電路,因此次級電流很小。
  5. Finding a feasible and efficient load balanced strategy for the ultra - scalable multi - plane multi - stage switch architecture is a top of nowadays research. the dissertation proposes a two - stage load balanced scheme for the ultra - scalable multi - plane multi - stage switch architecture based self - routing and non - blocking permutation benes network. the approach uses reasonable and efficient logical queueing strategy and schedule scheme in ingress traffic managers and switch planes to realize the two - stage load balancing of ip traffic which for different destination addresses

    本文提出一種適用於基於完全可重排無塞benes拓撲構建的多平面多路徑(多級)超大容量交換結構的兩級負載均衡策略,通過在流量管理器和benes交換平面內部實施合理而效的隊列組織調度方法,有效實現了基於不同目的地址的ip流量在兩個層次上的負載均衡,較好彌補了ciscocrs - 1系統在平面選擇和中間級選擇時所採用的簡單隨機或輪循方案的不足。
  6. Semiconductor integrated circuits. detail specification for type jf3140 and jf3140a bimos operational amplifiers with high input impedence

    半導體集成電路. jf3140 jf3140a型bimos抗運算放大器詳細規范
  7. With the setting of the peculiar conditions, we contribute the above system model for the first time to a kendall model, i. e. / l, : the size of buffer 1 / fcfs ( for same kinds of cells ) / l2 : the size of buffer 2 / non - prevail pr ( for different kinds of cells ) we resolved the model by " state transfer " method

    在設定工作環境及條件的基礎上,本論文首次為該系統模型建立了肯達爾排隊模型。即:並運用狀態轉移方法進行了解析。最後的模擬實驗數據表明優先級調度?線群多通道出atm交換系統模型較好地改善了hol塞,提排隊atm交換網路的性能。
  8. Secondly, compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory, a novel topology of cmos preamplifier latch comparator circuit is presented. considering trade - off between kickback noise and power dissipation, reference resistance value is optimized. according to the encode demands of different stage resolution, clock - control encode circuit is designed

    其後,在具體的子adc設計中,對比各比較器類型的優缺點,並基於預放大鎖存快速比較理論,提出一種新型速低功耗預放大鎖存比較器電路拓撲;根據adc系統所允許的參考電壓最大波動限制,在回饋噪聲對參考電平的影響和功耗之間折衷,確定優化的參考電值;根據不同級精度的編碼要求,設計出時鐘控制編碼電路。
  9. Because of block in head of line ( hol ), input buffer strategy make the whole switch system performances declining drastically at heavy oflbred load, and some improvements of input buffer strategy are put forward to overcoming tlle head of line block. virtual output queues ( voq ) is chosen as input buffer strategy. dpa and ilqf ce1l scheduling algorithms for voq are silllulated

    由於緩存的隊頭塞使得負載條件下緩存策略的交換系統各方面性能急劇下降,由此提出了克服緩存隊頭塞的改進方法,最後本文決定選用虛擬出隊列( voq )的緩存策略,並且研究了與虛擬出隊列相對應的ilqf (最長隊列優先)和dpa (對角線優先)信元調度演算法,為交換系統的asic設計提供依據。
  10. We have designed different measurement instruments according to the methods. the instrument used to measure electrode is a high precision multi - channel system constructed with a iaadc as the core and high input impedance amplifier and low input current multiplexer

    對于硫屬玻璃電極,我們設計了以精度的adc為核心,配以抗低噪聲的前置放大器和低漏電流多路模擬開關的多路精密電極測量系統。
  11. If line length is half wave at a certain frequency and both the load resistance rt and source resistance rs are higher than the characteristic impedance zo, then both the voltages at input and at load are maximum at that frequency and both the voltages at input and at load are minimum at half of that frequency

    負載端電及電源電於傳線特性抗情況下,當線長為某頻率波長之半波,則端與負載端電壓在該頻率均為最,在該頻率之半時則電壓均為最低。
  12. If line length is half wave at a certain frequency and the load resistance rt is lower while source resistance rs is higher than the characteristic impedance zo, then both the voltages at input and at load are minimum at that frequency and both the voltages at input and at load are maximum at half of that frequency

    負載端電低於傳線特性抗及電源電於傳線特性抗情況下,當線長為某頻率波長之半波,則端與負載端電壓在該頻率均為最低,在該頻率之半時則電壓均為最
  13. To switch the resistance of the mram element from low ( 1 ) to high ( 0 ), or vice versa, an electric current must flow through inputs connected to the memory element

    為了將mram單元的電由低( 1 )變( 0 ) ,或者反過來,電流必須流經連接記憶單元的線。
  14. Arduino ( atmega ) pins configured as input are said to be in a high - impedance state

    介面如設置為input模式將導致該介面處于狀態。
  15. A large amount of experience data accumulated through long term operation is introduced. combined with the definition of relative requirements, the choosing and definition of operation index of high - frequency channels specially used for protection of hubei electric power network are discussed and elaborated through calculation and analysis such as input impedance and channel impedance of transmitter, sensitive voltage of received signal, redundancy of received signal, warning of channel redundancy and warning of channel faults etc

    引用了長期運行中積累的大量經驗數據,通過計算分析,結合有關規程規定,探討和闡述了湖北電網繼電保護專用頻通道諸如收信機抗及通道抗、收信靈敏電平、收信裕度、通道裕度告警、通道異常告警等運行指標的選取和確定。
  16. 2. we design a configuration of frequency - doubler according to the optimum focus condition and the cavity stability condition | a + d | < 2 and optimize it based on " mode - matching " and " optimum coupling ". 99. 96 % of optical impedance - match efficiency and over 95 % of spatial mode - matching efficiency are achieved eventually by using t = 10 % of input coupler in our experiment

    ( 2 )根據最佳聚焦條件和腔的穩定性條件( | a + d | 2 )對四鏡環型倍頻腔進行了設計,並分別從「模式匹配」和「最佳耦合鏡透射率的選擇」兩方面著手對腔進行優化,在我們的實驗中採用10的耦合鏡,獲得抗匹配效率為99 . 96 ,空間模式匹配效率於95以上的模式。
  17. 2. the input stages of the ccii and the operational amplifier in transimpedance implifier are realized with folded cascode amplifier to reach high cmrr, large open loop gain and low offset

    2 .為了提儀表放大器的電源抑制比,並得到大的開環增益,相對低的失調等性能,電流傳器的級和跨放大器中運算放大器級均採用折疊共源共柵放大器。
  18. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計級時,為了使共模電壓范圍達到軌至軌,不是採用傳統的差動結構,而是採用了nmos管和pmos管並聯的互補差動對結構,並採用成比例的電流鏡技術實現了級跨導的恆定;在中間增益級設計中,電流鏡負載並不是採用傳統的標準共源共柵結構,而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在出級設計時,為了提效率,採用了推挽共源級放大器作為出級,出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計,採用了帶電流鏡負載的差分放大器設計了一個基準電流源,給運放提供穩定的偏置電流和偏置電壓,保證了運放的穩定性;並採用了帶調零電的密勒補償技術對運放進行頻率補償。
  19. Main research result : 1. to succeed in researching miniature pressure modulator, realizes integretion of electropneumatic conversion, high importation resistance, low power consumption, bear vibration and miniaturization by making use of physics / electricity characteristic design of piezo ceramics ; 2

    主要研究結果: 1 、利用壓電陶瓷的物理/電氣特性設計研究成功了微型壓力調節器,實現了電氣轉換、抗、低功耗、耐振動和微型化的統一。
  20. Usually the bridge circuit has a relatively high input impedance so that it has an insignificant effect on the signals in the transmission line

    通常橋接電路具有較抗,因此傳送線上的信號將不受影響。
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