address-data bus 中文意思是什麼

address-data bus 解釋
地址-數據總線
  • address : n 1 （信上的）稱呼，姓名；地址。2 致辭；寒喧；演說；正式請願。3 談吐，風度。4 〈pl 〉 求愛，獻殷...
  • data : n 1 資料，材料〈此詞系 datum 的復數。但 datum 罕用，一般即以 data 作為集合詞，在口語中往往用單數...
  • bus : n （pl busses buses）1 公共馬車；公共汽車；客機。2 〈口語〉汽車，機器腳踏車；飛機。3 【電學】信息...
  1. The microprocessor uses the address bus to locate data stored in memory.

    微處理機使用地址總線設定在存貯器中存貯的數據的地址。
  2. Power on - off, can run step by step function to display 32bit address bus and data bus value

    4 .免重覆開關機，開機后32bit address bus and data bus即能一步一步的顯示
  3. With led and digits synchronous display address bus and data bus, easier to

    Bus和data bus采led與數字顯示器同時顯示
  4. Synchronous display address bus and data bus, easier to know all the status

    同時顯示，如此更容易了解位址及資料匯流排各種狀態status
  5. Difference : digits display address bus and data bus codes in hexadecimal for

    不同處:乃cv - 44單步追蹤顯示部份之address bus和data bus用
  6. Difference : with led and digits synchronous display address bus and data bus, easier to

    不同處:乃cv - 38單步追蹤顯示部份之addressbus和data bus
  7. Use digits display a0 - a23 address bus and d0 - d15 data bus in hexadecimal

    用數字顯示器做十六進位碼顯示
  8. This software system of chip simulation ' s main function is simulate the main logic circue chips, 8088cpu, memory, registers, data _ bus, address _ bus, control _ bus and other chips. this function is based on the object - oriented technology, construct the chip object by the chip classes that we defined. because this system need to simulate the detail function of computer hardware, so this system simulate the 8088cpu ' s order system, support the basic compile languages. one of the feture of this system is the simulation of a static memory, the room of the memory can be configured by testers from 1k to 64k

    由於本系統在模擬過程中需要完全模擬計算機硬體的工作原理，因此本系統還模擬了8088cpu的基本指令系統，支持基本的匯編指令，在實驗過程中可以由實驗者輸入相應的匯編指令以執行操作，並查看各晶元器件的引腳參數變化情況。本系統模擬的一個特點是動態模擬了存儲器的大小，存儲器容量可以由實驗者根據需要自己設置，范圍從1k到64k 。
  9. Advantages of std bus and structure of pc / 104 bus are referred to design the user - bus, which uses three bus structures, i. e. address bus ( ab ), data bus ( db ) and control bus ( cb ). it is well compatible, and the applying system has flexibility and common use and is convenient to extent for users

    該總線採用三總線結構，即地址總線（ ab ） 、數據總線（ db ）和控制總線（ cb ） ，具有良好的兼容性，從而使應用系統具有靈活性和通用性等特點，方便用戶對應用系統進行擴展。
  10. Peripheral devices in embedded systems are often connected to the mcu as memory - mapped i / o devices, using the microcontroller ' s parallel address and data bus. this results in lots of wiring on the pcb ' s to route the address and data lines, not to mention a number of address decoders and glue logic to connect everything

    由於并行總線擴展時連線過多，外圍器件工作方式各異，外圍器件與數據存儲器混合編址等，都給單片機應用系統設計帶來布線復雜，線路板面積大，易引起emi和esd干擾等困難，這在一些比較復雜的應用系統是難以接受的。
  11. On the base of investigating the properties of pci address / data bus and the sequence of read, a re - use model of pci address / data bus is proposed

    討論了pci介面ad雙向總線及pci介面讀操作時序的特性。提出了pciad總線再復用模型。
  12. Use 40pcs led display a0 - a23 address bus and d0 - d15 data bus in binary

    用40個led做二進位碼顯示
  13. 3 can check address bus or data bus circuit open short or not

    3可知address bus或data bus信號本身有無開短路情形
  14. 4 can check address bus or data bus shortage with other signals or not

    4可知address bus或data bus信號有無和其它信號短路
  15. This scheme fully considers the internal structure of jx5 microprocessor, at the same time, the processor ’ s processing ability, address and data bus architecture is efficiently utilized. so with the minimal testing cost, a strong fault testing and trace debugging ability is provided to meet the jx5 processor ‘ s testing demand

    該方案充分考慮了jx5的內部結構，有針對性的選擇了一系列成熟可靠的可測性技術和方法，經過精心組合搭配，並充分利用jx5所具有的處理能力和cpu特有的地址、數據總線結構，在盡量少的增加測試開銷的前提下，提供了很強的故障測試和追蹤調試能力，很好的滿足了jx5對測試的需求。
  16. The system controlling logic, multiplexing data bus and multiplexing address bus have been designed. the simulations have passed

    完成了系統的控制邏輯、數據總線復用和解碼部分的地址復用器的設計，模擬並通過。
  17. In the "talk" example, the controller sends the address and command-to-talk to the talker, by using atn and the data-bus.

    在「說」的例子中，控制器利用ATN和數據總線把地址和說命令送給說者。
  18. In the " talk " example, the controller sends the address and command - to - talk to the talker, by using atn and the data - bus

    在「說」的例子中，控制器利用atn和數據總線把地址和說命令送給說者。
  19. The model for re - use pci address / data bus and the chip for pci bus security have been verified by asic

    本文研究的pci介面ad總線再復用模型、 pci介面信息安全晶元通過了asic （ applicationspecificintegratedcircuit ）流片驗證。
  20. Though the analysis about the powerpc bus, there are four parts in biu : instruction pretreatment part, address bus treatment part, data bus treatment part and data pos - treatment part. the second part focuses on the memory consistency

    通過對powerpc結構的總線協議的分析，總線介面部分主要由指令預處理部分、地址總線處理部分、數據總線處理部分和數據后處理部分組成，完成微處理器和外部總線的數據交互。
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