arithmetic circuit 中文意思是什麼

arithmetic circuit 解釋
運算電路
  • arithmetic : n. 1. 算術，演算法；計算。2. 算術書。
  • circuit : n 1 （某一范圍的）周邊一圈；巡迴，周遊；巡迴路線[區域]；迂路。2 巡迴審判（區）；巡迴律師會。3 【...
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機體系結構及軟體結構的特點，從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究，提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究，提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略，同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術，提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案，實現該方案所需增加的電路少，可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。
  2. Each unit is extracted from the circuit, and is analyzed detailedly in framework, configuration and design approach. the instruction system of c9821 is unscrambled and then the instruction decode algorithm are obtained. the complete program of c9821 including basic arithmetic and root square operation is realized

    在軟體方面，破譯了c9821的指令系統，分析了指令譯碼電路的設計技術，分析了計算器內bcd碼的四則運算及開方運算演算法，得到了實現c9821全部功能的程序，掌握了該計算器的程序設計方法。
  3. The reactive power compensation is an important engineering in the power system. the active reactive power compensator designed in this text takes the instantaneous reactive power theory of three - phase as foundation, and is formed by the reactive current testing circuit, current tracking control circuit and the main circuit, and among them the current tracking control circuit is formed by instruction current arithmetic circuit, current polarity checkout circuit and current tracking control logic circuit three parts in the circuit form

    無功功率補償是電力系統中的一項重要工程，本文所設計的有源無功功率補償器是以三相瞬時無功功率理論為基礎的，它由無功電流檢測電路、電流跟蹤控制電路和主電路三大部分組成，其中電流跟蹤控制電路由指令電流運算電路、電流極性檢測電路和電流跟蹤控制邏輯電路三部分構成。
  4. We have successfully designed an experiment system for the no invasion blood pressure measurement with our own ip. in our research and develop task we have done a lot work to study foreign instrumen and design ideas. this experiment system is based on msp430 series mpu with excellent erformance and applies advanced digital signal process and intelligent technology. in hardware design, the following means were applied : after a lot of experment and fully knowing about the characteristic of the pulse wave signal, we have designed the accurate and credible circuit to collect the pulse wave signal ; power circuit, communicaion circuit, power drivers circuit have been disigned for the instrument. in software design, the following arithmetic were applied : 1

    軟體方面進行了以下演算法研究: 1 .綜合試驗各種數字信號處理方法對波形進行平滑處理: 2 .採用lms自適應方法對脈搏波信號進行了降噪處理; 3 .應用微分閉值法提高了脈搏波信號的檢出率，有效識別了運動干擾引起的偽波信號; 4 .利用測振法基本原理並進行大量實驗的基礎上，提出了比較準確可行的收縮壓和舒張壓的識別演算法，使測振法在本無創血壓儀中得到了完整而充分的應用。
  5. Dissertation explains the theory and characteristices of switched reluctance motor based on its idealy linear math mode. analyseing and researching on control characteristic, control parameters, control strategy and their relationship, thesis designed hardware circuit and software of control system based on the strategy. dissertation discussed the transform function of system and illustrates it is essential to chang parameters in the pid control arithmetic, estimating parameters for the digital pid controller primarily, dissertation also researched on the exciting and protection of igbt

    論文以開關磁阻電動機的理想線性數學模型為理論基礎，對其原理特性進行了說明，對開關磁阻電動機的控制特性（轉速、轉矩） 、可控參數（導通角、關斷角、相電流、繞組端電壓）與控制策略（電流斬波、電壓斬波、角度位置控制等）及它們之間的關系進行了研究和分析。
  6. Besed on the circuit, electromagnetism and electric power electronics theories, we have done some theory research on the harmonics induced by thyristor commutate circuits of ac - dc locomotive, surge electromagnetism process. we calculate the theory content of harmonics using the fourier arithmetic under thyristor commutate and surge electrmagnetism process

    論文根據電力機車類型的不同，運用電路、電磁場和電力電子學理論研究了交?直型電力機車相控整流時諧波的產生機理、勵磁涌流的電磁過程，並對晶閘管相控整流和勵磁涌流時的理論諧波含量進行了傅里葉分析。
  7. Lastly, the hardware circuit of digital acquisition system is designed, and the programs for system controlling and adaptive filter arithmetic are designed. eeg can be observed clearly after d / a switching. at the same time, eeg data is transmitted to the upper machine by serial communication, so we can see eeg waveform by virtual instrumentation

    在此基礎上，針對固定濾波器存在的問題，提出了將自適應濾波技術應用於腦電測試中，並進行了理論研究和模擬研究，設計出了能較好地濾除50hz強干擾的自適應陷波濾波器和去基線漂移的自適應濾波器。
  8. The lumped circuit model of gunn diode was incorporated into the fdtd arithmetic

    Gunn二極體的集總電路模型被編入了fdtd演算法。
  9. Using “ logical effort ” method to analyze the circuit ’ s critical path, and choose the optimized size of transistors in theory by this method. then, using sta technique simulates and analyzes the circuit to optimize transistors size further, and the circuit optimization arithmetic based on sta is gained. results proved that the optimization strategy of combining theory and practice have better effect

    結果證明，這種理論與實際結合的優化策略具有較好的效果;三、典型條件下，所實現版圖關鍵路徑延時1 . 38ns ，平均功耗45 . 3mw ，版圖面積0 . 05112mm2 ，達到了較小的延時、功耗和面積;四、針對所設計的算術邏輯部件，研究了一種獨特的內建自測試方法，只需較少的測試向量就可實現該部件100 %的故障覆蓋率，具有很高的效率和較低的代價。
  10. Through theoretic reckoning and simulating analyzing, several control strategies for shunt apf were compared and chose ip - iq arithmetic of the instantaneous reactive power theory control strategy as the right scheme to produce the instructing current. based on it, some new control arithmetic was subjoined to suppress the resonance in system and balance the dc side capacitor voltage. two topologies of main circuit were compared and chose the three - phase voltage - source converter with a split - capacitor as its main circuit structure

    通過理論計算和模擬分析，比較了並聯型apf的幾種控制策略的優點和缺點，從中選擇瞬時無功理論控制策略i _ p - i _ q計算方式為指令電流產生的演算法，並在此基礎上增加了抑制系統諧振和平衡直流側電容電壓的控制；比較了並聯型apf主電路的兩種常見形式，從中選擇了三相電壓型變流器的主電路形式；算出適合該apf的直流側電容和出線電感的參數；設計出能有效消除apf產生的高次諧波的高通濾波器。
  11. Secondly we use canny arithmetic operators to get the edge of image, and remove the short link of edge then link the edge with small clearance. at last we can calculate the distance of conductor and the width of conductor according to the grade direction to detect of defect of the circuit boards

    然後選用canny運算元提取導線邊緣，並對邊緣進行短分支去除和邊緣連接處理，最後根據梯度方向來計算導線間距離和導體寬度，以此來判斷電路板缺陷。
  12. The whole system is divided into several modules and each module is connected by signals, which based on the arithmetic of spwm and the requirement of design. the module design is to design inner circuit structure of each module and uses verilog language to code the synthesizable and reusable code. the functional stimulation uses the nc - verilog of cadence

    系統設計是基於spwm的實現演算法和設計指標要求，對系統劃分模塊和對各個模塊進行信號連接；模塊設計是設計每個模塊內部電路結構，並用verilog語言編寫可綜合可復用代碼；功能模擬使用的工具是cadence的nc _ verilog ，首先對每個模塊進行功能模擬，模擬通過之後，把所有模塊代碼組合在一起，構成整個系統代碼，在外部輸入埠加激勵，對整個系統進行功能模擬。
  13. The main process includes following : system design, module design, function simulation, time simulation and hardware verification. the whole system is divided into several modules and each module is connected by signals, which based on the arithmetic of uart and the requirement of design. the module design is to design inner circuit structure of each module and uses verilog language to code the code

    系統設計是基於uart的實現演算法和設計指標要求，對系統劃分模塊以及各個模塊的信號連接;模塊設計是設計出每個模塊的功能，並用verilog一hdl語言編寫代碼來實現模塊功能;功能模擬和時序模擬使用的工具是以dence的nc _ veri109 ，首先對系統的每個模塊進行功能和時序模擬，模擬通過之後，將整個系統的代碼在外部的輸入埠加上激勵，對整個系統進行功能和時序模擬;硬體驗證是用fpga對系統進行了功能驗證。
  14. This article introduces the design and implement of flight simulator based on dsp which contains five parts. the first part establishs the math model of flight simulator which contains the model of aerodynamics and flight mechanics, the model of standard atmosphere and wind model ; the second part introdces primarily the arithmetic of numeric integral which is very important to dyanmic system simulant. the third part introduces the design of hard interface circuit and program. the fourth part introduces the data flow graph of the flight simulator software and gunge - kutta integral arithmetic. the finall part introduces the design of serial port communication software, it contains communication protocol, the process of upper machine and lower machine communication and the programing of serial port communication by vc + +

    本文介紹了基於dsp的飛行器模擬器設計與實現，主要分為五個部分，第一部分建立了飛行模擬的數學模型，包括飛行器空氣動力學和飛行力學的數學模型、標準大氣模型和風模型；第二部分主要介紹了數值積分演算法，它在動態系統模擬中是很重要的；第三部分為硬體介面設計與編程；第四部分介紹了氣動模擬軟體的數據處理流程和runge - kutta積分演算法；最後一部分為串口通信軟體設計，介紹了通信協議、上下位機處理流程和vc + +串口通信編程。
  15. In data sampling circuit, high - speed, complex programmable logic device cpld technique is used. high - speed double - port ram, control sampling time sequence logic, cpu interfaces and bus circuit are implemented in cpld. sampling speed is up to 80mhz, sampling depth is ik - byte, and cpld can fulfill the requirement of the software arithmetic to sampling

    在數據採集電路中採用了高速復雜可編程邏輯器件cpld技術，晶元內設計有高速雙埠ram 、控制采樣時序邏輯及cpu介面、總線等電路，采樣速率高達80mhz ，采樣深度1k位元組，很好地解決了超聲波微位移傳感器軟體演算法對采樣的要求，並可實現在線升級，大大提高了系統的整體性能。
  16. In the course of design, we fully consider the actual conditions on the railway and take a series of corresponding measures to the concrete problem. such as we select high - accuracy microconvertor and have the converted function in succession data collecting system chip aduc812, design v / f circuit and external a / d circuit. in anti - interference of the hardware, we try to disperse each function module to avoid interfering each other, adopt photoelectric isolated technology to dispel the circuit connection of input and output. in controlling we import arithmetic mean into strain wave algorithm and real computing technology of virtual value for sample treatment of data, that is using the software to smooth away interfere error and to calculate actual value, thus it makes the precision of the data improve greatly

    在設計過程中，根據系統要求，充分考慮鐵路上的實際情況，針對具體問題採取了一系列的相應措施，如在器件選擇方面選用高精度microconvertor系列、具有adcdma連續轉換功能的數據採集微控制器晶元aduc812 ，設計了v f變換電路和外部a d轉換電路；在硬體抗干擾方面，將每個功能模塊盡量分散獨立開來以避免相互干擾、採用光電隔離技術消除輸入輸出通道上的電路聯系；在控制方面對于采樣數據的處理引入了算術平均值濾波演算法和真有效值的計算方法，即通過使用軟體來濾除系統中有干擾造成的誤差並計算真值，從而使數據的準確性得到極大地提高。
  17. The paper designed the pn analyzer with using receiver circuit with optimized twice down - convert and highly efficient process arithmetic and comprehensive design and particularly harmonious system. in the system the

    該文研製的pn分析儀pnscanner採用了很優化的二次下變頻接收機電路以及效率很高的基帶處理演算法，嚴謹周到的設計和獨特的協調機制。
  18. This paper introduces all sorts of measuring and protecting arithmetic about intelligent release of circuit breaker. and the hardware and software of the intelligent release are designed to realize the intelligent protection, remote control, centralized management of the breakers

    本文介紹了斷路器的測控單元智能脫扣器的各種測量及保護演算法原理，並進行了具體的硬體和軟體模塊的設計，旨在實現斷路器的智能保護、遠程控制和集中管理。
  19. Therefore, based on formers " research and recurring to the rather strong ability of holding mistakes possessed by rough set theory, this paper present a new attribute reduction arithmetic as well as an improved value reduction arithmetic based on the combination of rough set theory and duality boolean calculation, and use it to handle the reduction progress of the decision table including all kinds of fault cases which is established by considering the signals of protection relays and circuit breakers, then form the general mixed knowledge model and bring up an idea about automatic production of decision table

    為此，本文在前人研究的基礎上嘗試藉助粗糙集理論所具有的較強的容錯能力，提出了基於粗糙集理論與二值邏輯運算相結合的屬性約簡演算法以及改進的值約簡演算法，並將其應用於由斷路器和保護為條件屬性，考慮各種故障情況所組成的診斷決策表的約簡過程中，形成了混合策略知識模型，同時提出了診斷決策表自生成的基本思想。
  20. Studies the work principle and key technology of the boost pfc circuit in theory, designs a small power digital boost pfc converter, this converter works in average current control means and based on tms320lf2407 dsp, adopts current and voltage double closed loop control and pi control arithmetic

    從理論上分析和研究了數字控制boostpfc電路的工作原理和關鍵技術，設計了一款小功率基於tms320lf2407dsp的平均電流控制型的數字控制boostpfc變換器，該變換器應用了電壓、電流雙閉環控制和pi控制演算法。
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