bit bus 中文意思是什麼
bit bus
解釋
位總線-
It must be equipped with an 8-bit data-bus.
它需要配備8位數據總線。 -
On designing for chinese use a biu bus interface unit of a 32 - bit risc
32位微處理器總線介面部件的設計 -
I ' ll be a bit late. got to go to the bus station
我會晚一點要去一趟汽車站 -
Tms320vc5402 is a fixed - point digital signal processor, made by texas instruments incorporated, which is 16 - bit word length. vc5402 has enhanced harvard architecture built around one program bus, three data buses, and four address buses for increased performance and versatility
另外,採用mcs - 51系列cpu作為採集處理卡板載mcu也存在一些比較嚴重的問題,如cpu的指令執行速度慢,總線帶寬窄等缺點,不能完成數據的高速處理。 -
6 x 32 bit pci bus master standard version 2. 2 interface
匯流排介面符合2 . 2標準 -
A 16 - bit risc microprocessor soft core is designed, and the instruction system, controller, bus and clock are studied
本文設計了一個16位精簡指令集微處理器軟核16rmpu ,主要研究微處理器的指令系統、控制器、總線和時鐘等設計。 -
Should take after the bus, not to vie with each other, not bicheng bit crowded
乘坐公共汽車應先下後上,勿爭先恐后,勿擠逼搶位。 -
Microprocessor system bus - 8 - bit and 16 - bit data multibus i. mechanical and pin descriptions for the eurocard configuration with pin and socket indirect connectors
微處理機系統8位和16位數據多路總線.具有插腳和插座連接器 -
Microprocessor system bus i, 8 - bit and 16 - bit data - part 3 : mechanical and pin descriptions for the eurocard configuration with pin and socket indirect connectors
微處理機系統總線i8位及16位數據第3部分:採用插針和插座連接器 -
Measure and control unit adopted 16 - bit, high - speed a / d converter, it can guarantee the speed and precision of alternating sample. the part of communication adopted can bus to transmit the data, it was suitable for real - time control and can guarantee dependability. it adopted the can bus adapter of yan - hua company whose type was pcl - 841 to communicate with processor unit the processor unit adopted industrial pc, which can guarantee the system work well for a long time
其中下位裝置採用西門子公司的高性能十六位處理器c167cr - lm ,其內嵌can總線控制器便於通過can總線與上位機進行通訊,數據採集部分採用十六位高速a d轉換器從而保證了交流采樣的速度與精度,通訊部分採用可靠性高,適于現場實時控制的can總線來傳輸數據,與上位機介面採用研華公司的型號為pcl - 841的can總線適配器,為保證系統長時間可靠運行上位機採用工控機。 -
Information technology - microprocessor systems - high - performance synchronous 32 - bit bus : multibus ii
信息技術.微處理器系統.高性能同步32位總線:多總線 -
Microprocessor system bus - 8 - bit and 16 - bit data multibus i. mechanical and pin descriptions for the system bus configuration, with edge connectors direct
微處理器系統總線. 8位和16位數據多路總線.第2部分:具有邊緣連接器 -
Based on s698 technology, obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller, etc. the bus interfaces is composed of i2c spi magnetic card interface and ic card interface. obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition
Obt - devsys - s698是s698系列嵌入式處理器開發板中的一員,其上包括:具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器,主頻160mhz , sram存儲器, flash存儲器具有三路uart介面,一路ps 2介面, led發光二極體控制電路,中斷操作按鈕其外擴總線包括i2c總線介面spi總線介面磁卡介面智能卡介面等。 -
In the dissertation , we discribe the implementation of large capability video data acquisition system based on pci bus of computer 。 the system is composed of data acquisiton card and corresponding software 。 the data acquisiton card include two acquisition channels , 8 - bit digitization at rates up to 13. 5mhz 。 frist , the architecture of the video data acqusition system is studied 。 then , the function and implementation methode of each module are introduced in detail 。 the control module of the video data acqusition card is implemented by using of the isp technology of cpld and vhdl programming technology 。 the a / d converter used assembler to implement the initialazation programe 。 and the double buffer technology is used for large capability data acqusition. because a contiously large memory is difficult to apply in windows operating system 。 finally we use broland c + + to introduced the devleoping procedure of drivers 。
在實際的研製過程中,利用cpld的在系統可編程( isp )技術和基於vhdl語言的可編程邏輯器件設計技術實現了視頻數據採集卡的控制模塊。在視頻的a / d轉換模塊,用匯編程序模擬i2c總線對初始化a / d轉換晶元。針對大容量數據採集,採用了雙緩沖技術解決wndows操作系統下難以申請到大容童連續內存的間題。 -
There is a chance that ameobi, who has had a bit of back trouble, will play some part in tonight ' s friendly at hull city, but it would be a surprise if owen is on the bus
受到背傷困擾的阿梅奧比倒是有可能在今晚的比賽當中露個臉,不過要是歐文也上場了的話,那絕對說的上是一個驚喜了。 -
In can - bus communication technique, the circuit design method of can - bus node and the technique of structuring distributed can - bus controlling network are put forward, how to realize can calling and broadcasting communication under pelican mode is explained thoroughly, and the computational technique of bit - timing parameter of can controller sja1000 is detailed
在can總線通信技術中,給出了can總線節點電路的設計方法和基於can總線的分散式控制網路的組建方法,詳細論述了增強模式下can總線分散式控制網路實現點名和廣播通信的原理與方法,深入探討了can控制器sja1000位定時參數的計算方法。 -
The fourth chapter introduces the circuit design method of can - bus node, as well as the technique of structuring distributing - type can - bus measuring and controlling network, explains thoroughly how to realize can calling and broadcasting communication under pelican mode, and discusses detailedly the computational technique of bit - timing parameter of can controller sja1000. the latter part of this chapter points out several important problems confronted and solved by the author in the course of designing can - bus communication system
第四章介紹了can總線節點電路的設計方法和基於can總線的分散式測控網路的組建方法,詳細論述了增強模式下can總線分散式測控網路實現點名和廣播通信的原理與方法,深入探討了can控制器sja1000位定時參數的計算方法,總結了作者在設計can總線通信系統的過程中遇到和解決的幾個關鍵問題。 -
The detector is a silicon photoelectric diode array s4111 - 35q made in japan. the difference from the former data acquisition is choosing a 16 - bit adc module based on usb bus. this module reduces the complexity of programming and operating
數據採集部分與以往高溫計設計上最大的不同是選擇基於usb總線的16位a / d轉換數據採集模塊,具有速度快、編程簡便、即插即用等優點,簡化了編程以及操作的復雜性,同時省去了下位機與上位機的數據傳輸。 -
Microprocessor system bus - 8 - bit and 16 - bit data multibus i. functional description with electrical and timing specifications
微處理器系統總線. 8位和16位數據多路總線i .第1部分:電氣和定時規范功能描述 -
The data transfer capacity ( in bits per second ) of a bit - parallel bus
每條位并行總線上可傳輸數據的容量,用比特秒表示。
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