block logic array 中文意思是什麼
block logic array
解釋
邏輯陣列區塊-
Researched the methods to test configrable logic block ( clb ) and its sub - blocks. based on a “ divide and conquer ” methodology, the clb resources are divided into three basic blocks : logic units, carry logic module ( clm ) and lut ’ s ( look up tables ) ram - mode. the testing configurations are implemented based on a two - dimensional array structure for logic blocks
主要基於「分治法」對clb及其子模塊進位邏輯( clm ) 、查找表( lut )的ram工作模式等進行了測試劃分,分別實現了以「一維陣列」為基礎的測試配置和測試向量,以較少了測試編程次數完成了所有clb資源的測試。 -
Finally, on the basis of the mpeg - 1 layer hencoding hardware structure, the block of logic communicates with the pc over the parallel port and the interface for flash memory are design. then a mpeg audio coding system, which applies to store audio signal, is presented through the field programmable gate array device technology
最後,在mpeg - 1層編碼的硬體結構的基礎上,結合計算機並口通信和flash存儲器的介面模塊,採用現場可編程邏輯器件fpga技術,最終設計了一種應用於音頻信號存儲的mpeg音頻編碼系統。
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