bus interface module 中文意思是什麼
bus interface module
解釋
總線介面模塊-
Bus interface module bim
總線介面模塊 -
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method
在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。 -
On the basis of familiar with can bus and gsm communication, considering hev ( hybrid electric vehicle ) battery administrative system ' s demand for the host pc monitoring system, i have designed can - rs232 converter gateway to realize transmission the real - time data from can node to rs232 serial port, which is carried out by the project of at89c52 mcu + sja1000 can controller + 82c250 can controller interface. host monitoring software has accomplished real - time datas display, storage, historical datas graph analysis and storage fashion change from access to excel, at the same time, realized important datas transmission remotely with tc35 short message module. system software programs in assembly and vb
Can - rs232轉換網關採用at89c52微處理器+ sja1000can控制器+ pca82c250can控制器介面實現對can總線節點通訊的監聽，並將其轉換成rs232串口電平發送到pc機串口，同時用siemens公司的tc35模塊和at指令實現現場採集系統重要數據和錯誤信息的短消息通訊。在上位pc機監控系統中，主要完成的是對串口設置的選擇控制、現場採集數據的實時刷新顯示、歷史數據的圖表分析及數據的access數據庫存儲和excel電子表格的轉換。系統軟體採用匯編語言和vb實現。 -
The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module
數據採集模式實現部分的大部分工作是在前面板上完成的，後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四塊電路:符合電路，數據流控制器電路， sdram陣列和系統總線介面電路組成。後面板採集卡從總體物理上主要有四塊電路組成: 485串列通信電路， adc控制電路，心電數據處理電路和門控信號產生電路。 -
During the design of vxi - bus serial controller module, the functions of vxi - bus including time - sequence for vxi interface, resource management, interrupt process, bus arbitration, are accomplished. to advance the performance and stability, the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence, the uart, the parameterized baud generator and “ pipeling frame ”. the handle type of data transfer bus for vxi - bus is researched thoroughly, and the format of serial data transfer is designed
在vxi總線串列控制器設計中，實現了vxi總線控制器的基本功能，包括vxi總線介面時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串列總線時序向vxi總線時序的轉換、通用異步收發器（ uart ） 、參數化波特率發生器、流水線結構等功能模塊;在設計中還深入研究了vxi總線數據傳輸的各種操作類型，制定了串列數據傳輸的編碼格式。 -
Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function
本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。 -
A interface module of dot matrix graphic lcd and keyboard based on isa bus
總線的點陣圖形式液晶顯示器和鍵盤的介面模塊 -
At present, the interface mode of many lcm ( lcd module ) products is bus interface mode, which can be divided into serial peripheral interface and parallel peripheral interface
目前， lcd模組常用的工作方式有總線介面模式，分為串列和并行兩種方式，使用靜態畫面來測試顯示品質。 -
Based on s698 technology, obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller, etc. the bus interfaces is composed of i2c spi magnetic card interface and ic card interface. obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition
Obt - devsys - s698是s698系列嵌入式處理器開發板中的一員，其上包括：具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器，主頻160mhz ， sram存儲器， flash存儲器具有三路uart介面，一路ps 2介面， led發光二極體控制電路，中斷操作按鈕其外擴總線包括i2c總線介面spi總線介面磁卡介面智能卡介面等。 -
System control module accomplishes many functions, such as systemic initialization, controling work of the system, man - machine interface and selecting channel. it communicates with other modules by i2c bus. timing signals are inputed into microprocessor through p1 port and control signals are provided through p2 port
系統控制模塊和其他模塊間的通訊基於i ~ 2c總線，並利用了p1口進行各時鐘信號的檢測和利用p2口的各線作為控制線宋控制相應模塊的工作。 -
In this module, we focus on an improved 2 - d median - filter and a real time edge detect algorithm which has very regular computational structure. in chapter 4, we use fpga to capture the image data from infrared sensor and create the synchronization signal and output the video to monitor. chapter 5 describes the design of communication interface between dsp, fpga and missile control system, and focus on a new verilog description style called cycle accurate, and finally we design an i2c bus using this description style
本論文按照處理機的工作流程，首先討論fpga與視頻探測器之間的數據通訊模塊的設計，接著介紹了圖像預處理模塊，在預處理模塊中，重點介紹了一種改進的二維中值濾波方法和一種特別適于硬體實現的邊緣檢測演算法;在第四章，討論了用fpga實現圖像獲取和模擬視頻輸出;第五章，討論了fpga與dsp之間以及fpga與彈上機之間的通訊模塊的設計，接著重點研究了一種新的verilog語言的描述風格，並用此寫法在上fpga實現對外圍設備的初始化模塊;最後，對本文所做的工作進行了總結。 -
In this paper, mobile terminal ' s hardware design method and correlative details of circuit implement, including chip selection, power supply, gprs module interface circuit, camera module interface circuit and spi0 bus expand uart circuit were introduced
文中詳細敘述了移動終端的硬體設計方法和電路實現的相關細節，包括晶元選型，電源轉換， gprs模塊介面電路、攝像模塊介面電路和spi0總線擴展uart電路。 -
This thesis includes the hardware design of messaged _ based interface, the realization of the word serial transfers, the translating of scpi commands, the programme of awg ' s instrument driver, the debugging work associated with functional circuit and soft panel and the testing of module compatibility based vxi bus, edc
本文的主要內容包括： vxi總線消息基介面硬體設計、字串列通信協議實現、 scpi命令翻譯、 vxi任意波形發生器儀器驅動器設計、與功能電路和軟面板的聯調和大量的模塊兼容性測試。 -
According to the necessity of cpci - gpib controller interface module, analyzing the cpci bus, gpib bus and interface function in detail, the design accomplished the function of bridging connection, conversion of protocol, logic control and so on
本文根據設計cpci - gpib控制器介面模塊的需要，在詳細分析cpci總線、 gpib總線協議及介面功能的基礎上，完成了設計任務，並實地驗證了cpci與gpib總線之間的橋接、協議轉換、邏輯控制等功能。 -
This paper sums the situations and trends of domestic and international engineering machinery firstly, discusses the demands and implements of intelligent and long - range monitoring and controlling, and constructs a three - layer model of the engineering machinery long - range monitorin and control system : the front unit control systems, the machine - mounted monitoring system and the long - range control center ; proposes a kind of structure of embedded system based on c / os - ; dissects the characteristics, structure, operation and schedule principle of c / os -, modified the kernel, and improves dependability of the schedule algorithm ; designs the hardware in detail : the microprocessor at91rm9200, the store unit, the serial interface, the human - computer interaction interface, the can bus control module, the debug interface and the reset circuit etc. ; on this basis, succeeds in transplanting c / os - to the system, sets up the operating system framework, designs the driver, sets up the institutional framework of upper user ' s application, provides the method and concrete application process of the graphical user interface module based on c / os -. the system designed in this paper, not only has the functions of local control, friendly human - computer interface, but also has various interfaces which make the system can be managed by the long - rang center
本文首先綜述了國內外工程機械行業發展的現狀和趨勢，闡明了實施工程機械智能化及遠程監控的意義和需求，並為此構建了工程機械遠程監控系統三層結構模型:前端單元控制系統、車載監控系統和遠程監控中心;提出了一種基於c / os -的嵌入式車載監控系統構建方案;深刻剖析了c / os -的特點、內核結構、運作機理、調度演算法，在此基礎上對其內核進行移植前的必要修改，並對其調度演算法進行了可靠性改進;對構成嵌入式系統硬體的各個主要部分:嵌入式微處理器at91rm9200 、存儲單元、串列介面、人機交互介面、 can總線控制模塊、調試介面以及復位電路等做了詳細的設計;在此基礎上，成功地將c / os -實時內核移植到本文研發的嵌入式硬體系統中，建立了車載監控系統的操作系統體系結構，編寫了該操作系統的底層硬體驅動程序，建立了上層用戶應用程序的組織結構，並給出了圖形用戶界面模塊化應用程序在c / os -操作系統上的建立方法和具體應用過程。 -
Besides, have introduced the whole systematic design, the function and realization of each module in detail, and especially, the structure of bus interface chip ql5032, programs designed in the paper
論文中介紹了系統的整體設計，詳細介紹了各個模塊的功能和實現，重點介紹了pci總線介面晶元ql5032的結構和程序設計。 -
The main contents are as follows : the structure of mixed - signal circuit which newly - defined in ieee1149. 4 std is analyzed in detail, especially anolog boundary module and test bus interface circuit. on the basis of mixed - signal boundary scan technology, a scheme of mixed - signal boundary - scan test system is presented and the hardwares are implemented, including the controller and display unit
主要研究的內容以及所作的工作如下:詳細分析了ieee1149 . 4標準中針對混合信號電路測試新增的結構，即模擬邊界模塊及測試介面電路。基於混合信號邊界掃描技術標準，提出混合信號邊界掃描控制器的設計方案並實現了其硬體設計，包括邊界掃描控制模塊、顯示驅動模塊等。 -
So most software can be test on the pc and can be transplanted to gateway after all is ok. the platform is designed from top to bottom, at first, the functionalities and interface of the three module should be specified clearly, and then go into the details of it, came back to modify the interface made before. the tree modules are connected through pci bus. adsl module implements the adsl modern as the atu - r ; the network interface consists of two part, wileless lan ( it is optional ) and lan, can connect with two different lan. the main control module controls the action of the others which is made of sdram, microcontroller, flashrom and serial port
為了設計方便，整個硬體平臺按照自頂向下的設計方式，首先按照功能分為三部分： adsl模塊，網路介面模塊，主控模塊，這些模塊之間採用流行的pci總線相連接，規定模塊之間的介面關系，然後進行細化，反饋回來完善原先定義的介面關系。其中， adsl模塊可作為單獨的adsl數據機使用，起到atu - r的功能：網路模塊由兩部分組成，無線lan和lan介面（其中前者為可選項） ，可以連接wirelesslan和lan 。主控模塊起到協調的作用，包括sdram 、微控制器、 flashrom 、串口等。 -
Bus interface module
總線介面模塊
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