chip density 中文意思是什麼
chip density
解釋
晶元密度-
The 32 - bit cpu core with enhanced multiply accumulate emac unit provides optimum performance and code density for the combination of control code and signal processing required for mp3 decode, file management, and system control. fs2401clqn is a single - chip mp3 audio decoder
當用戶端的pc與存儲媒介之間透過usb 2 . 0介面做資料交換時，因僅需要cpu最低程度的參與，而大多是以硬體處理方式，所以可以達到高速傳輸的目的。 -
Shorts between metal runners are important only in those regions of the chip with a high density of closely packed metal runners.
金屬布線間的短接，僅在那些具有高密度密集封裝型金屬布線的晶元中才極為重要。 -
The key stage of fabricating gene chip is pretreatment of glass surface including the processes of nh3h2o treatment, aminosilane treatment and aldehyde treatment. the pretreatment can grow active group that can bind probe effectively on the surface of glass slide. as a result, the actively treated glass slide can suit for fabricating in - situ synthesis high density gene chips
基因晶元制備技術的關鍵步驟是玻片表面預處理，即對玻片表面進行羥基化、氨基化和醛基化處理，使表面生長的活性基團能有效固定寡核苷酸探針，以滿足原位合成高密度基因晶元對玻片的要求。 -
The accelerometer which has simple fabricated process and high sensitivity and small parasitic capacitance and residual stress is hybrid integrated with the interface circuit using ic nude chip. so the density of the package is increased, and the noise of the sensing system is decreased. these found the base of capacitive accelerometer module using the mcm method
該傳感器製作工藝簡單，靈敏度高，支撐梁採用u型，減小了刻蝕后的殘余應力，用玻璃作為襯底，減小了襯底和硅可動質量塊間的寄生電容，且把傳感器晶元和用ic裸片製作的介面電路集成在一起，提高了封裝密度，減小了傳感器系統的噪聲，為採用mcm技術製作電容式加速度傳感器模塊打下了基礎。 -
Silica ( sio2 ) is a very promising material used to fabricate the optical waveguide for its low insertion loss, efficient fiber - to - chip coupling, high integration density and compatibility with microelectronic process. it is possible to realize the monolithic integration of optical devices with microelectronic devices and the passive devices with the active ones
而硅基氧化硅光波導以其低的插入損耗、能有效的與光纖耦合、集成密度高、可以充分利用現已成熟的微電子技術等特點成為較為理想的實現波導結構的材料。 -
The information revolution and coming period of ulsi silicon chip, which make the performance integration of chip unit continually increase, drive the demands for larger circuit density and greater performance
=信息革命及ulsi矽片時代的來臨，使單片功能集成度持續增長，驅動著對更大電路密度和更高性能的需求。 -
The assembly process and experimental results are included in this paper. in order to increase the power density of the module, a three - dimensional fc - ipem package structure is introduced. a half - bridge fc - ipem module is built in the lab with bga power devices and flip - chip technique
為實現更高的功率密度，本文把微電子行業中廣泛應用的倒裝晶元技術應用於模塊電源研究中，完成了一個半橋fc - ipem （ flipchip - integratedpowerelectronicsmodule ）模塊。 -
By optimizing and controlling the technology conditions of grey yam linear density, spinning speed, stretching temperature, stretching ratio, tension - setting and shrink - setting, the polyester staple with shrinkage rate over 20 % was successfully developed with normal polyester chip
通過對原絲線密度、紡絲速度、拉伸溫度、拉伸倍率、緊張熱定型及鬆弛熱定型等工藝條件的優化和控制，採用常規聚酯切片成功開發出收縮率在20 %以上的滌綸短纖維。 -
The real - time measurement and control of dynamic fluid density produced by chip microprocessors
基於單片機實現動態流體濃度實時測控的研究 -
As an advanced package, 3 - d stacked csp assembly provides significant size and performance advantages than traditional single chip package. meanwhile, high packaging density tends to generate more power in a package and cause serious thermal problem
三維疊層晶元尺寸封裝（ stackedchipscalepackage ）是目前最先進的微電子封裝形式之一，具有體積小、重量輕、封裝效率高等特點。 -
The flip chip technology developed recently provides the shortest possible leads, lowest inductance, highest frequency, best noise control, highest packaging density, greatest number of inputs / outputs ( i / 0 ' s ) and lowest profile when compared with other popular interconnect technologies
新近發展起來的電子封裝倒裝焊技術，具有封裝密度高、信號處理速度快、寄生電容/電感小等優點，是目前最具發展前景的先進封裝技術之一。
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