chip memory 中文意思是什麼

chip memory 解釋
晶元記憶（器）
  • chip : n 1 碎片，削片，薄片；碎屑；薄木片；無價值的東西。2 （陶器等的）缺損（處）。3 （賭博用）籌碼；〈p...
  • memory : n. 1. 記憶；記憶力；【自動化】存儲器；信息存儲方式；存儲量。2. 回憶。3. 紀念。4. 死後的名聲，遺芳。5. 追想得起的年限[范圍]。
  1. The card will look similar to a photocard driving license, which is similar in size to a credit card. also being considered is having the individual s fingerprint or iris image stored in the memory chip of the card to identify the cardholder and prevent any fake cards

    公民咭外型與含照片的駕駛執照相似，大小則近似信用咭。為了防止偽咭，咭內晶片會載有持咭人的指模或虹膜影像，此舉引來輿論關注。
  2. The function of video card memory played down apparently on the display card is similar to memory in the computer ; its function is to preserve the data dealt with to display chip - picture element temporarily

    顯卡上的顯存所發揮的作用與電腦中的內存差不多，它的作用是暫時存放顯示晶元所處理的數據?像素。
  3. According to signal processing capcity and the memory of sharc21060 chip, six shrac chips are used in practically processing. every chip takes on different task, and it basically realized streamy parallel processing

    根據信號處理運算量的需求以及sharc21060晶元的內存量，在實際處理中，共使用了6片sharc晶元，各晶元承擔不同的任務，基本實現了流水線式的并行處理。
  4. The arithmetic system was compiled with c and assemble language, distributing memory with rcp or cmd files, writing into chip and realizing expectable functions

    演算法系統由c及匯編語言編寫，並通過rcp或cmd文件對內存分配，最終寫入片內實現預期功能。
  5. Since the chip has interior sram and it ' s difficult and slow to test sram exteriorly, in chapter four we use the technique of bist in design of testability of sram, which makes it possible to test the memory at normal working speed

    由於片內有sram ，而sram的片外測試比較困難且速度較慢，所以文中第四章採用bist技術對sram進行了可測性設計，完成後可以用正常的工作速度對存儲器進行測試。
  6. Because of the large scale of the p / g routing network in the memory chip layout, general linear equation group resolving algorithms for calculating the equivalent resistance between the nodes cannot satisfy the restrict of both memory space and running time simultaneously

    摘要由於存儲晶元版圖p / g網規模的巨大，對于計算電阻網路中節點間等效電阻問題，直接利用常規線性方程組求解演算法無法同時滿足內存空間與運行時間上的限制。
  7. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design

    它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。
  8. Count that judge key assignments and interrupt accomplish the function of keyboard. two chip of saa1064 with i2c interface compose 8 bit led display subsystem. thus the configuration are simplified. at24c01 is selected for the data memory chip

    而鍵盤採用了計數判斷鍵值和中斷的相結合方式；同時八位led顯示子系統採用基於i ~ 2c總線的saa1064晶元構成的顯示子系統，簡化了系統的結構。
  9. The developed apparatus can automatically measure evapotranspiration at setting up interval and memory the data through a 32 kilobyte data storage memory. measured data can be transmitted to personal computer by rs232 series communication interface. apparatus will be trigged at measurement time by a real time chip set in it

    該儀器通過實時時鐘晶元實現間隔採集動作的觸發及時間、日期的計數；利用液晶顯示器（ lcd ）進行顯示；使用它能在無人監管的工作環境下，定時進行蒸散測量並將測得數據自動保存到32k數據存儲器中；再通過rs232串列通訊介面將數據傳送到pc機進行進一步處理。
  10. Don ' t tell me the beast implanted a memory chip

    別告訴我怪獸給你植入了記憶晶元
  11. This software system of chip simulation ' s main function is simulate the main logic circue chips, 8088cpu, memory, registers, data _ bus, address _ bus, control _ bus and other chips. this function is based on the object - oriented technology, construct the chip object by the chip classes that we defined. because this system need to simulate the detail function of computer hardware, so this system simulate the 8088cpu ' s order system, support the basic compile languages. one of the feture of this system is the simulation of a static memory, the room of the memory can be configured by testers from 1k to 64k

    由於本系統在模擬過程中需要完全模擬計算機硬體的工作原理，因此本系統還模擬了8088cpu的基本指令系統，支持基本的匯編指令，在實驗過程中可以由實驗者輸入相應的匯編指令以執行操作，並查看各晶元器件的引腳參數變化情況。本系統模擬的一個特點是動態模擬了存儲器的大小，存儲器容量可以由實驗者根據需要自己設置，范圍從1k到64k 。
  12. Chip, bubble memory

    磁泡記憶晶元
  13. Memory chip, bubble

    磁泡記憶晶元
  14. Hongkong post today ( 17 april 2003 ) announces the appointment of two pop stars, miriam yeung and ekin cheng, as ambassadors to raise public awareness among all hong kong identity card holders of the option to embed an e - cert in the memory chip of the new smart id cards for one year free of charge in the coming hksar smart identity card replacement exercise

    香港郵政於今日（二三年四月十七日）宣布，委任本港紅歌星楊千?和鄭伊健為電子證書大使。兩位大使會向香港身份證持有人進行宣傳，告知市民可在即將展開的智能身份證換領計劃中，選擇把可供免費使用一年的電子證書加入智能身份證的記憶晶片內。
  15. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  16. The hardware of the system is composed of a high - speed optical - isolator circuit, a first - in / first - out dual - port memory buffer circuit, a pci interface chip ql5032, and a logic control circuit

    系統的硬體部分是由高速光電隔離電路，雙埠fifo存儲緩沖電路， pci總線介面電路ql5032及邏輯控制電路等組成。
  17. In the designed hardware, at89c51 single chip computer and many kinds of new type circuit chip ( including : special power measuring chip - cs5460a, ds1302 calendar / clock chip, sms0601 lcd, x5045 serial memory ) are used for design. the hardware circuit is simplified, the meter ' s anti - interference ability is enhanced and the precision of measurement is also advanced

    設計中以at89c51單片機為核心，採用多種新型集成電路晶元（包括電能計量專用晶元cs5460a 、 ds1302日歷時鐘晶元、 sms0601液晶顯示器、 x5045串列存儲器）進行介面設計，簡化了硬體電路，提高了電能表的抗干擾能力和測量精度。
  18. Smart cards look like credit cards but have a microprocessor and memory chip inside

    智慧卡的外觀就像信用卡，但卡片內多了微處理器和記憶晶片。
  19. The on - chip memory performance of embedded systems directly affects the system designers decision about how to allocate expensive silicon area. a novel memory architecture, flexible sequential and random access memory fsram, is investigated for embedded systems

    而我們開展的一項研究驗證了一種新型低功耗的片外存儲器結構的性能潛力，即靈活的順序與隨機存取存儲器lexible sequential and random access memory ，簡稱fsram 。
  20. Performance oriented customization of on - chip memory capacity

    面向性能優化的片上存儲器容量定製策略
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