clock rate 中文意思是什麼

clock rate 解釋
時標速度
  • clock : n 1 鐘；掛鐘，座鐘，上下班計時計。2 〈俚語〉記秒錶，卡馬表；〈美俚〉〈pl 〉駕駛儀表，速度表，里程...
  • rate : n 1 比率，率；速度，進度；程度；（鐘的快慢）差率。2 價格；行市，行情；估價，評價；費，費用，運費...
  1. The second parameter specifies the rate of the pixel clock in megahertz

    第2個參數指定的是像素時鐘頻率（單位為mhz ） 。
  2. One 1995 microprocessor uses this deeper pipeline to achieve a 300 - megahertz clock rate

    一臺1995年生產的微處理器用這種更先進的流水線操作可達到300兆赫的時鐘頻率。
  3. Given the high penetration rate of mobile phones in hong kong, voice portal can offer a cost effective way for bureaux and departments to provide public services round the clock

    香港的行動電話滲透率甚高，因此，話音入門網站將可成為一個高成本效益的途徑，讓決策局部門為市民提供全日不停的服務。
  4. If you are travelling to a destination several time zones away, you will probably experience jet lag as the body internal circadian clock is only able to reset itself at a rate of about 1 hour per day

    如您于飛行旅途中須橫越多個時區time zone ，您有可能因身體內在時鐘又稱生物鐘無法適應外在時間突變，而衍生飛行時差反應。
  5. The paper first reviews the research background and actuality of the filter " s design in china and other country, introduces the meaning of the project and the work of the paper, narrates the theory of the switched - capacitor network and the basic switch building blocks, analyses the related factors of the design of sc filter. such as the selection of the architecture, the trade off of the opamp " s gain, bandwidth, phase margin, slew rate and setting time, the effect of the switch " s on resistor, how to reduce the charge injection and the clock feed - through, the power consumption and the selection of the sampling frequency and so on

    本文首先回顧了濾波器設計的國內外研究背景和現狀，介紹了本課題提出的意義以及本文的主要工作，論述了開關電容網路原理和基本開關模塊，分析了開關電容濾波器設計的相關因素：電路結構的選擇，對運算放大器設計中高增益、寬帶寬、相位裕度、轉換斜率和建立時間等的折中考慮，開關的打開電阻對電路的影響，開關電容電路中怎樣減少電荷注入和時鐘饋通，以及整個電路的功耗問題和采樣頻率的選擇等。
  6. For example, an alarm clock that sounds a wake - up call every morning at the same time cannot simply use a fixed rate schedule of 86400000 milliseconds 24 hours, because the alarm would be too late or early on the days the clocks go forward or backward if your time zone uses daylight saving time

    例如，每天清晨在同一時間發出叫醒鈴聲的鬧鐘不能簡單地使用固定的計劃頻率86400000毫秒（ 24小時） ，因為在鐘撥快或者撥慢（如果您的時區使用夏令時）的那些天里，叫醒可能過晚或者過早。
  7. Currency exchange rate international country codes the rules of custom zip code e - calendar world clock measurement conversion

    貨幣匯率國家代碼海關法規郵編區號電子日歷世界時鐘單位換算
  8. The actively mode - locked erbium doped fiber laser is very attractive among those potential sources which can generate broadband tunable near transform - limited pulse with high repetition rate and has been used as the ideal optical transmitter and all optical clock source in the future long - distance communication systems

    對于高速光纖通信系統而言，能輸出高重復頻率的、近極限超短脈沖的主動鎖模光纖激光器被認為是未來遠程無中繼光纖通信系統的理想光源。但其難點是工作穩定性問題。
  9. Melatonin has a simple chemical structure, but it plays a decisive role in bodily functions, monitoring the work of the glands and organs, and regulating hormone production. it also controls over - stimulation of the sympathetic nerves to lower blood pressure and slow the heart rate, thus reducing the impact on the heart. it also alleviates mental stress, improves sleep, adjusts the body s biological clock, relieves jet lag, strengthens immunity, increases the body s resistance to germs and viruses, and prevents cancer and senile dementia

    褪黑激素的化學結構非常簡單，但是在人體內卻具有舉足輕重的作用：它監視著體內各種腺體器官的運作，指揮各種荷爾蒙維持在正常的濃度它可以抑制人體交感神經的興奮性，使得血壓下降心跳速率減慢降低心臟負擔它能夠減輕精神壓力提高睡眠品質調節生物時鐘緩解時差效應，而且具有加強免疫功能抵抗細菌病毒及預防癌癥老年癡呆癥等多種疾病的功效。
  10. The fpga is response of the system cooperating work and the clock rate or the parameter of the system can be adjusted

    整個系統的協調工作由fpga完成，系統時鐘可調，參數可選。
  11. The paper compares some algorithms on rs decoding, makes improvements based on the me algorithm, removes the modifying step in decoding truncate rs code, corrects unsuitable statements in the related papers, and parameterizes the rs decoding module, reducing its area by 20 %. the paper overcomes the signal integration problem in multi - clock design, greatly lowers the phase jitter without area increase, introduces pll to adjust rate for the first time, and parameterizes the module

    本文比較了實現rs解碼的幾種演算法，並在me演算法基礎上進行改進，創造性的去掉了縮短碼解碼中的校正環節，糾正了有關論文中的不當論述，並將rs解碼模塊進行了參數化設計，同時也將rs解碼的規模縮小了20 ；克服了多時鐘設計中的信號完整性難題，在沒有增加模塊面積的條件下，大幅降低數據的相位摘要抖動，首次引入鎖相環來調整速率。
  12. In particular, they used a molecular clock rate derived from invertebrates, which is slower than the one based on vertebrates

    特別的是，他們使用從無脊椎動物推衍出的分子時鐘，速度比脊椎動物的分子時鐘要快得多。
  13. Chapter seven puts forward the scheme to adjust data rate, discusses the design in multi - clock circumstances, and implements the multi - clock application on adjusting data rate for dvb - s

    第七章實現了調整數據速率的功能，討論了多時鐘設計的問題，並給出面向dvb - s數據速率調整應用的多時鐘解決方案。
  14. The equilibrium thermal radiation in a flat space - time or a curved space - time behaves like planck black spectrum represented with coordinate quantities. we regard the fact that the radiation from a thermal equilibrium system shows planck black spectrum as a basic physics law, from which it is demonstrated that the transitivity of clock rate synchronization is equivalent to the zeroth law of thermodynamics. the condition of clock rate synchronization is weaker than that constructing simultaneity surfaces. in the space - time satisfying the condition of clock rate synchronization, the zeroth law of thermodynamics is valid. on the other hand, in the space - time where the zeroth law is valid, one can define an identical clock rate

    平直或彎曲時空中的平衡熱輻射，表現出用坐標量表示的普朗克黑體譜.把熱平衡系統的輻射具有普朗克黑體譜作為一條基本的物理規律，以此為基礎，論證鐘速同步的傳遞性等價于熱力學第零定律.鐘速同步的條件比建立同時面的條件要弱.滿足這一條件的時空，熱力學第零定律在其中成立.第零定律成立的時空，一定可以定義統一的鐘速
  15. 4. through using the concept of logic balance, a high performance telecommunication switch network test chip is accomplished by using xilinx virtex 300e - 6 and the working clock frequency is up to 125mhz. this chip can give an exact test for the network delay time, throughput, network delay time dither, rate of errors and lost data

    4 ）結合邏輯平衡的思想，採用xilinxvirtex300e - 6器件，為一家著名的通訊技術有限公司設計了速度達125mhz的交換網測試晶元，能夠對交換網的吞吐率，網路延時，網路延時抖動，數據包錯誤率，包丟失率等進行嚴格的測試，並根據當前網路的流量大小自動調節網路負載。
  16. Thus, we hypothesized that as windows xp senses that the cpu is idle, it triggers or allows the cpu to step down its clock rate

    因此，我們猜測當windows xp判斷cpu處于空閑狀態時，它就觸發或者允許cpu降低其時鐘速率。
  17. In the same time, it is needed to revise pcr ( program clock reference ) in ts for the rate of ts is changed

    同時傳輸流的碼率發生了改變，需要對傳輸流的pcr作相應的修改，以消除碼率改變造成接收端機頂盒的圖像抖動。
  18. With performance of up to 900 million floating - point operations per second ( mflops ) at a clock rate of 150 mhz, tms320c6711 is fit to tackle with the problem. this thesis made a deep research on the h. 263 standard and the tms320c6711. we propose the plan of the software and the hardware for the realization of the h. 263 protocol which include the structure of the whole program, the c code of the key algorithm of the h. 263, the c code of some subprogram, and the circuit for image processing with the tms320c6711 as the processor. furthermore, we optimize some subprogram in common use to make the coding more quickly. we encode a video sequence with the tms320c6711dsk successfully, even if the compression rate is as high as 100, video effect we get after decoding the code stream is satisfying

    首先系統地研究了h . 263協議編碼器的基本演算法，句法，碼流結構和tms320c6711dsk的原理結構以及ccs2 . 0的開發環境；在系統的軟體方面給出了總體流程圖，對于h . 263協議編碼器的某些核心演算法和子程序，給出了部分源代碼，對于dsp的各種代碼優化方法進行了討論，並且對代碼進行優化，從而在提高系統處理速度的同時減少代碼大小和內存需求量；硬體方面以tms320c6711為核心處理器，提出了基於tms320c6711的圖像處理平臺的硬體實現方案，並給出了原理電路圖；最後在tms320c6711dsk上成功對視頻數據進行高壓縮比（ 100倍以上）的編碼，對回傳的結果解碼后得到了令人滿意的效果。
  19. The dsp core of the dm642 is 32 - bit fixed - point dsps of c64x, with the performance of up to 4800 million instructions per second ( mips ) at a clock rate of 600mhz

    支持兩路ntsc / pal制式的視頻採集、處理和播放，設計了系統內部數據結構，對視頻幀圖像進行多格式軟體降采樣處理和運動檢測處理。
  20. Bus clock rate

    匯流排時鐘頻率
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