comparator circuit 中文意思是什麼

comparator circuit 解釋
比較電路
  • comparator : n. 【機械工程】比測器，比較儀，比長儀；【化學】比色計；比…器；【無線電】比較器；比較電路。
  • circuit : n 1 （某一范圍的）周邊一圈；巡迴，周遊；巡迴路線[區域]；迂路。2 巡迴審判（區）；巡迴律師會。3 【...
  1. Secondly, compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory, a novel topology of cmos preamplifier latch comparator circuit is presented. considering trade - off between kickback noise and power dissipation, reference resistance value is optimized. according to the encode demands of different stage resolution, clock - control encode circuit is designed

    其後，在具體的子adc設計中，對比各比較器類型的優缺點，並基於預放大鎖存快速比較理論，提出一種新型高速低功耗預放大鎖存比較器電路拓撲;根據adc系統所允許的參考電壓最大波動限制，在回饋噪聲對輸入參考電平的影響和功耗之間折衷，確定優化的參考電阻串阻值;根據不同級精度的編碼要求，設計出時鐘控制編碼電路。
  2. The discriminator circuit is mainly composed of an integrated voltage comparator, max921, and owns the characters of very low - power and low operating voltage

    該甄別器具有微功耗、低工作電壓的特點，適宜於輸入脈沖速率要求不太高的電路。
  3. Abstract : the rechargeble batteries are used for backup power internal electrically equipments and instruments. but batteries lifetime usually is shorten by overwork and then malfunctions of equipment are induced. to avoid the complexion described above, the protection circuit against overwork is designed. it is based upon the voltage comparator and regulator. it will light up a red led when the volume of the batteries discharged close upon 50 % ; it will switch off the load automatically when it discharged closing to 80 % of their energy capacity, thus overwork of batteries can be avoided and lifetime may be extended

    文摘:用蓄電池做后備電源的系統（或設備） ，常因過放電導致電池提前報廢而造成設備故障.根據電池電壓隨容量變化的規律，利用電壓比較器和電壓基準源設計製作了電池放電保護電路，當電池放電量接近容量的50 %時，啟動預警信號；當電池放電量達到容量的80 %時，電路自動切斷負載，防止電池過度放電，延長電池壽命，保證系統（或設備）在供電恢復正常后能正常運行
  4. To cancel the offset - voltage of the comparator, a switch capacitance circuit is used between the three pre - amplifier stages. the charge pump circuit is used to boost the clock voltage of the switch transistor

    採用電荷泵電路提供開關管柵過驅動電壓，帶隙基準電路作為電荷泵穩定電壓的輸入，有利於改善開關電路的性能。
  5. The chip can be widely used in mp3 player, pda, digital camera, cells phone and portable products etc. this thesis first introduces the basic theory of switching power supply. the operating theory of this circuit has been demonstrated. the operating principle and simulation analysis about band gap reference, self - biased current source, one shot circuit, hysteresis comparator, and current - limit circuit have been particularly expounded in this thesis

    本文首先闡述了開關電源的工作原理，詳細介紹了本電路的整體工作原理，最後重點介紹了自偏置電流源電路、基準源電路、單穩態觸發器電路、峰值電流限制及低電池電壓遲滯比較器的工作原理，並利用eda工具larker ? ams 、 hspice對電路進行了完整的設計和模擬模擬，給出了合理的電路數據，各子模塊電路的電特性參數均達到或優于設計所需指標。
  6. A special circuit is designed to generate square wave with frequency up to 100mhz based on a high speed hysteretic and differential comparator

    該電路以一個高速比較器為核心，具有差分、遲滯的特色，可產生頻率高達100mhz的方波。
  7. Detail specification for type jt54ls85 ls - ttl 4bit magnitude comparator of semiconductor integrated circuit

    半導體集成電路jt54ls85型ls - ttl四位數值比較器詳細規范
  8. Inside the integrated circuit ic1, after suitable divisions, the two frequencies are sent to the phase comparator that generates the lock voltage of the secondary oscillator

    在綜合電路ic1的內部，經過合適的劃分，兩個頻率被送往相位比較儀，這兩個頻率產生二級振蕩器的鎖電壓。
  9. Some sub - block circuits ( error amplifier, soft - start, enable comparator and under - voltage protection circuit ) are designed and several electrical characteristics are simulated using hspice. finally, the whole chip performance is simulated. and the results show the satisfaction to both function targets and characteristics

    在子電路設計中，本論文只對其中的誤差放大器、軟啟動電路、使能比較器和欠壓保護四個子電路進行了電路原理分析與設計，並在此基礎上，運用eda軟體hspice對各功能模塊的各項指標、參數進行了模擬、分析。
  10. In the meantime, the all sub - circuits are also designed and emulated carefully including inverter, rs type flip - flop, voltage reference circuit, error amplifier, voltage comparator, sawtooth - wave generator, pwm comparator, soft activation circuit and so on. as a result, all of the sub - circuits answer the requirements. this chip has taped out with the 0. 5um mix - signal process of csmc

    本文利用cadenceeda集成電路設計工具、 spectres模擬工具，對集成電路內的各個模塊包括反相器、基本rs觸發器、基準電壓電路、誤差放大電路、電壓比較電路、鋸齒波振蕩發生電路、 pwm比較電路、軟啟動電路、驅動電路等進行了具體的設計和模擬，且達到了預先設定的指標。
  11. And the ways to optimize the circuit architecture, minimize the circuit nonidealities and improve the circuit performance are analyzed combined with the characteristics of the modulator architecture. based on it, the switched - capacitor integrator, class a amplifier, nonoverlap clock, voltage reference, comparator, feedback dac have been designed. in the end, the layout design is shown

    調制器採用全差分開關電容電路實現，並根據系統結構特點就如何優化電路結構、克服電路中存在的非理想特性、提高電路性能作了具體分析，在此基礎上完成了開關電容積分器（開關、電容、運算放大器） 、參考電壓源、比較器、兩相非交疊時鐘、反饋dac等模塊的電路結構和參數設計。
  12. In meantime, the all sub - circuits are also designed and emulated carefully including error amplifier, voltage reference circuit, voltage comparator, rs type flip - flop, soft - start circuit, sawtooth - wave generator, pwm comparator, current added circuit and so on

    其次對控制器內部晶元的各個模塊誤差放大電器、自舉電流電路、電壓基準源、電流求和電路、 rs觸發器和驅動電路等模塊進行了具體的設計和模擬的邏輯功能做了解釋。
  13. Subcircuit models are designed and simulated, which includes bias current source, voltage reference, error amplifier, pwm comparator, driver circuit, protection circuits for over - temperature, over - current. at last, combined with periphery component, the circuit is simulated, and the result meets the anticipant requirement

    並對集成電路內的各個模塊包括電流偏置電路、基準電壓電路、誤差放大電路、三角波振蕩發生電路、 pwm比較電路、驅動電路、過熱保護電路和過流保護等進行了具體的設計和模擬，並對整體應用電路進行了模擬，結果均達到了預先設定的指標。
  14. The whole circuit consists of a multiplier, an error amplifier, a comparator, a rs flip - flop, an and gate, and an inverter, etc. the electronic circuit simulator cadence is utilized to practice the detailed functional simulation of the general circuit and the subsystem circuits

    整個電路由模擬乘法器、誤差放大器、比較器、 rs觸發器、與門和倒相器等基本單元電路組成，採用工作站上的大型ic設計軟體cadence進行模擬。
  15. Detail specification for electronic components. semiconductor integrated circuit voltage comparator type cj 710

    電子元器件詳細規范.半導體集成電路cj 710型電壓比較器
  16. Rc and other relaxation oscillators just will not do since amplitude noise in whatever circuit functions as a comparator will appear as phase noise on the output signal

    Rc諧振器以及其它一些張弛振蕩器不能滿足要求，這是因為它們的核心是電壓比較器，需要利用電壓信號的波動（噪聲）來獲得穩定的輸出，這種波動就構成了時鐘的抖動。
  17. The author pays more attention to the analysis and design on the following sub - circuits : oscillator, comparator, hysteresis comparator, chip enable, etc. on completing the principle analysis and circuit design, the sub - circuits and whole chip circuit are verified with the eda tools hspice

    其次在電路設計中，作者基於升壓型dc / dc變換器和離散脈沖頻率調制方式的基本原理並根據電路功能的需要，進行了控制電路的總體結構設計和子電路模塊設計。
  18. By careful selection of the ratio between this resistor and the integrating resistor ( a few tens of ohms in the recommended circuit ), the comparator delay can be compensated and the maximum clock frequency extended by approximately a factor of 3. 3

    通過小心選擇這個電阻和積分電阻之間的比值（在推薦線路里，大約是數十歐姆） ，比較器的延遲就可能被補償，最大的時鐘頻率可近似延伸到3 . 3倍。
  19. In order to make full behavior simulation of sigma - delta modulator, the noise models have been set, taking into account most of the sigma - delta modulator ’ s non - idealities and the final result supports the noise models. last, the main circuits of modulator have been designed, such as operational amplifier, comparator and clock generator, the design principle of noise - killed logic circuit has been presented. these circuits have been simulated

    調制器的噪聲模型，考慮了影響調制器性能的一些主要非理想因素，通過模擬驗證了噪聲模型的正確性;最後，設計實現了結構中的主要電路，如運放、比較器、時鐘產生電路，闡述了噪聲抵消邏輯電路的工作原理，利用hspice和cadencespectre對各電路進行了模擬，驗證其功能。
  20. The temperature coefficients of voltage reference and current reference circuits are 18ppm / and 36. 2ppm / respectively. the combination of current - limited comparator and current - limited statemachine reduces the noises generated by transformer. the leading edge circuit could avoid ldmos premature shutdown

    論文著重介紹了該單片開關電源電路中部分子模塊:基準源電路、電流極限比較器電路、電流極限狀態機電路、前沿閉鎖電路和調節電路。
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