cpu register 中文意思是什麼
cpu register
解釋
中央處理機寄存器-
Excepting algorithms self, the software performance analysis and optimization always relate to the multi - hiberarchy storage archtechture, trying to utilize the nearside storage media such as register or level 1 cache and reduce actions on farside storage, and try to reach a linear performance, i. e. the computing performance only relate to the speed of cpu clock
現在的軟體性能分析及其相關的性能優化，除了程序本身演算法之外，幾乎所有的分析和優化都是在這樣一個多級的存儲體系結構上進行的，試圖盡可能地利用近端的存儲，期望達到一個接近線速的計算性能，即計算的性能僅由cpu的處理速度決定，與其他外設和數據存儲無關。 -
This register provides the status of data transfer to cpu
提供數據傳送方面的狀態。 -
The rpl request privilege level defines the current privilege level of the cpu when the corresponding segment selector is loaded in the segment register
Rpl （ request privilege level ）定義了在將對應的段選擇器加載到段寄存器中時cpu的當前特權級別。 -
Each time a segment selector is loaded on to segment registers, the corresponding segment descriptor is loaded from memory into a matching non - programmable cpu register
每次將段選擇器加載到段寄存器中時，對應的段描述符都會從內存加載到相匹配的不可編程cpu寄存器中。 -
So, under this background, we have designed and developed the new - generation of tax - controlled cash register based on embedded system with 32 - bit arm cpu
以此為契機，我們研製和開發了新一代的基於32位arm處理器的嵌入式系統的收款機，以滿足市場的需求。 -
While the mcus of fiscal cash register available on today ’ s market are mainly 8 or 16 - bit and don ’ t possess operating system, which result in the simple function, poor memory property and inconvenient manipulation etc. the aim of this project is the design of a novel kind of fiscal cash register based on 32 - bit arca2 cpu microprocessor of embedded system which match up to the national standard of tax revenue
但是，現在市場上的主流稅控收款機的處理器晶元多採用是8位或16位單片機，並且不採用操作系統，因此它的功能簡單、存儲能力弱，操作不方便等缺點。針對此現狀，我們設計和開發了一種基於32位arca2cpu微處理器的嵌入式系統的稅控收款機，以滿足目前市場的需要。 -
In a typical cpu, a register called the program counter ( pc ) is used to keep track of which instruction is to be fetched next
典型的cpu中，一種被稱為程序計數器的寄存器（ pc ）被用於跟蹤下一條被取出的指令。 -
Indicates a cpu register
指示一個cpu寄存器。
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