cryptogrammic 中文意思是什麼

cryptogrammic 解釋
密碼的
  1. Cryptogrammic chip introduced in this paper has been tested on the altera ' s apex20ke fpga. the main clock frequency reached 40mhz. the chip includes 30, 000 les. in order to utilize esb resource in altera ' s chip, we adopted embedded rom and ram and can realize the function of whole system with only one chip. lt is the embodiment of methodology and notion of sopc ( system on a programmable chip ). the simulation of this cryptogrammic chip proves the correctness of function of the chip, which shows that the important ideology based reconfigurable architecture has special significance in designing of cryptogrammic chip

    本文所闡述的密碼晶元在altera公司的apex20kefpga上進行了測試。工作頻率達到了40mhz ,佔用了3萬個le . ,利用altera器件的esb資源,採用內置ram和內置rom設計方法,用一片晶元即可實現整個系統的功能,充分體現了sopc的設計方法和理念,對晶元的模擬和測試均證明晶元功能正確,表明基於可重組體系結構這一重要思想在密碼晶元設計中具有特殊的意義。該晶元的設計遵循hdl設計方法學的一般方法。
  2. The design of this chip sticks to the general methodology of hdl design. lt is entered in hdl format with innoveda ' s visual hdl and simulated with modelsim simulator, after synthesized with fpga compiler ii, the edif is entered in quartus ii, which is supplied by altera corporation to place and route. the sdo file produced by quartus ii is backannotated to the netlists and timing - simulation is been done. the success of this cryptogrammic chip also shows the effectiveness and advantage of the methodology of high level design with hdl

    在innoveda的visualhdl設計平臺上用hdl語言完成了設計輸入,使用modelsim模擬器完成了功能模擬,使用synopsys的fpgacompiler進行了基於alterafpga庫的網表綜合,最後將edif網表輸入altera的布局布線工具quartus中進行了布局布線,將生成的sdo文件反標到modelsim模擬器中進行了時序模擬,該設計的成功,再一次表明了hdl設計方法的正確性和有效性。
  3. This paper systematically presents the whole design process of a cryptogrammic chip based on reconfigurable architecture. firstly it begins with a brief introduction to the background of the cryptogrammic chip design, and it clearly states the characteristic and the researching thoughts of cryptogrammic chip design with hdl. then the design environment and cipher algorithms are introduced briefly

    本文系統地論述了基於可重組體系結構的密碼晶元設計的全過程,文章首先闡述了該設計的課題背景,給出了使用hdl方法設計密碼晶元的特點和研究思路,然後對晶元的設計環境作了簡要說明,並對密碼演算法進行了簡單介紹。
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