d latch 中文意思是什麼

d latch 解釋
鎖存器
  • d :
  • latch : n 1 閂，插銷。2 碰鎖，彈簧鎖。3 【機械工程】檔器，擊子，活門。vt vi 用碰鎖鎖上（門等） 用插銷扣上...
  1. The paper is completed research of measurement and control system based on dsp under technology. the paper is designed a card with the data - collection conversion and control by adopting mainly tms320f240 among the dsps as kernel processor, with peripheric a / d and d / a circuit epm7128 ' s decode and latch circuit and isa interface circuit

    本論文主要是採用數字信號處理器dsp中的tms320f240作為核心處理器，結合外部的模數轉換和數模轉換電路、可編程邏輯器件epm7128的地址譯碼和鎖存電路和isa介面電路，設計了集採集、轉換、控制於一身的isa卡。
  2. In this paper design of some circuit including in a / d circuit is also analyzed, such as front analog circuit, sample clock circuit and data flip - latch circuit

    同時對高速轉換器件及轉換電路中包括前端模擬電路、采樣時鐘、後端數據鎖存等輔助電路設計進行了分析。
  3. It also means he can latch onto any clearances ; you ' d be surprised how many goals tally up over a season where a striker has latched on to a clearance

    你的中場球員會輕松地解決任何在中場的戰斗，這樣設置他們，你就為他們將來成為頂尖球員提供了很大的機會。
  4. Especially it allows various types of interruptions of external digital input, timer output and a / d conversion, each type of interruption has its own role in the signal measurement or in exact pace control, its fifo buffer function makes it possible to work at the sampling rate of 200k samples per second without carrying over - burden interruption rate, its latch type external interrupt request along with its high frequency clock makes a precise locating of pulse edges possible

    該控制系統在工作過程中，有多種產生於不同部件的信號需要檢測，其中有模擬輸入信號十三路，數字輸入信號三路，通過數據採集和信號分析，判斷該控制系統工作是否正常。結合系統檢測的具體要求，本論文從硬體設計和軟體設計兩個方面，實現了數據採集系統的硬體介面電路和軟體演算法。
  5. In details, some methods such as double peak value demodulation, double d trigger flip - latch, multi - cycle of synchronization frequency test, digital pid arithmetic are all adopted in my project

    在單片微機測控系統的設計中，採用劃分多個功能模塊的辦法，使得硬體和軟體的設計思路清晰，調試方便。
  6. Based on the construction of traditional flip - flop, we propose a novel edge - triggered flip - flip using one latch controlled by narrow pulse according to race - hazard of clock. then this principle is adopted in ternary circuit, a new ternary d type edge - triggered flip - fiop based on cmos transmission gate is proposed

    在二值單閂鎖結構邊沿觸發器的基礎上，把利用時鐘信號競爭冒險的思想應用於三值電路中，提出了基於cmos傳輸門的二值d型時鐘信號競爭型邊沿觸發器。
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