datapath 中文意思是什麼
datapath
解釋
數據通道-
4 yim j s, kyung c m. reducing cross - coupling among interconnect wires in deep - submicron datapath design. in proc
因為耦合電感的作用不只存在於相鄰線網,非相鄰線網間的耦合也是不能忽視的。 -
The thesis introduces the architecture, datapath, hardwire control of the soft core, and introduces the verification of the soft core. mcu is the heart of the embeded system
本文介紹了hgd08r01軟核的risc體系結構、數據通道設計、時序設計以及硬布線控制設計等,同時還介紹了改軟核的驗證流程與方法。 -
Multi - issue processors enhanced with momr units provide additional speedup over standard multi - issue processors with the same datapath. momr is a general architectural solution for word - oriented processor architectures to incorporate datarich operations
本文的一個重要貢獻是我們認為快速加密處理取決於一個處理器支持復雜位級運算和多字運算的能力。 -
1. study of the clb bus protocol and the pvci protocol ; 2. the design of clb - pvci bridge architecture ; 3. the design of each functional module, include the state machine, the address decoding and peripheral ip selection module, datapath module
Clb總線協議和pvci協議的研究; 2 clb - pvci橋總體結構的設計; 3各功能模塊的設計,包括狀態機、地址譯碼和外設ip選擇模塊、數據通道模塊; 4 -
Using a multiplexer - based method, the datapath of the multiplier is reconfigurable to perform either one 1024 - bit - multiplication or two 512 - bit multiplications in parallel. the chinese remainder theorem increases the decryption data rate by a factor of 3. 8
數據通路的設計採用一種基於多選器的動態重構方法,其模乘法器可以執行一個1024位的模乘冪運算,也可以并行執行2個512位的模乘冪運算,從而支持基於中國剩餘定理的加速策略。 -
A novel 32 bit embedded fix - point superscalar risc core is developed. then we analysis the power dissipation of risc core from view of instruction - set - architecture, datapath, supply voltage and dynamic power optimization
並從系統層次對risc處理器進行功耗分析,分別從改進指令體系結構、處理器數據通路、降低系統工作電壓和動態降低功耗四個方面進行低功耗研究。
分享友人