drain resistance 中文意思是什麼

drain resistance 解釋
漏電阻
  • drain : vt 1 排去(水等液體),排泄,放干 (away; off)。2 喝乾,倒空。3 用完,花光。4 使…某物枯竭;使…耗...
  • resistance : n. 1. 抵抗,反抗,抗拒,抵禦;敵對,抵抗力,反抗力,阻力,【生物學】抗病性。2. 【電學】電阻;阻抗;電阻器。
  1. Based on the equal strain consolidation model of sand drain, and neglecting the well resistance and the vertical drainage consolidation, a layered model for the nonlinear consolidation of sand drain, which accounts for the geostatic pressure varying along depth and the relationship between the average viod ratio and the logarithm of average effective stress, is presented

    摘要基於砂井等應變固結模型,考慮初始有效應力沿深度變化,忽略井阻和豎向排水固結的影響,應用平均孔隙比與平均有效應力的對數關系,建立砂井非線性徑向排水固結的分層計算模型,並求得常荷載作用下的徑向排水固結解析解。
  2. A model of the interface state density distribution near by valence band is presented, and the dependence of the threshold voltage on temperature, the c - v characteristics and the subthreshold characteristics are predicted exactly with this model ; the effects of s / d series resistance on the output characteristics, transfer characteristics and effective mobility of sic pmosfets are analyzed. thirdly, the output characteristics and the drain breakdown characteristics are modeled with the procedure medici. the output characteristics in the room temperature and 300 ? are simulated, and the effects of gate voltage. contact resistance, interface state and other factors on sic pmos drain breakdown characteristics are analyzed

    提出了一個價帶附近的界面態分佈模型,用該模型較好地描述了sicpmos器件閾值電壓隨溫度的變化關系、 c - v特性曲線以及亞閾特性曲線;分析了源漏寄生電阻對sicpmos器件輸出特性、轉移特性以及有效遷移率的影響;論文中用模擬軟體medici模擬了sicpmos器件的輸出特性和漏擊穿特性,分別模擬了室溫下和300時sicpmos器件的輸出特性,分析了柵電壓、接觸電阻、界面態以及其他因素對sicpmos擊穿特性的影響。
  3. Ti ? the resistance measured across the channel drain and source ( or input and output ) of a bus - switch device

    測量總線開關器件指定通道的源漏極間(或輸入和輸出)所得到的阻抗。
  4. The source drain extension ( sde ) structure and its reliability are thoroughly studied. first, it is shown that the sde structure can suppress short channel effect effectively and the parasitic resistance at the sde region has an effect on performance. it is proposed that increasing the dose condition in the sde region can reduce the parasitic resistance and should be adopted to achieve high performance for deep submicron devices

    本文對深亞微米源漏擴展mos器件結構及其可靠性進行了深入研究,首先通過模擬驗證了源漏擴展( sde )結構對短溝道效應的抑制, sde區寄生電阻對器件性能的影響以及sde區摻雜濃度的提高對器件性能的改善,指出了器件尺寸進一步減小后,提高源漏擴展區摻雜濃度的必要性。
  5. They include compiling a computer program which permits to incorporate various constitutive relation of soil skeleton, dilatancy, stiffness deterioration etc. comparative studies are made for various cases of soil stiffness, resistance of percolation, drain condition on boundary, loading form, constitutive relation, and stratification

    通過計算對各種土壤剛度、滲透條件、邊界透水條件、荷載形式、本構關系和不均勻性等情況做了比較研究,發現了一些新規律和新現象。並對它們做了一些討論和分析。
  6. The vertical band drain can keep the maximum drainage vacity and capacity and reduce the well resistance to greatest extent under lateral pressure in the engineering foundation

    垂直排水板在工程地基中受側力作用下,仍保持最大的排水空間和排水能力.最大程度減少井阻影響
  7. We probed into the most source - drain resistance and its temperature behavior particularly. the result of calculation indicated that the attenuation of source - drain current caused by the source - drain resistance increased when temperature increased

    對寄生的漏源串聯電阻及其溫度特性進行了詳細探討,計算結果表明,漏源串聯電阻給漏源電流造成的衰減在溫度升高后變得很大。
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