encode circuit 中文意思是什麼
encode circuit
解釋
編碼電路-
Secondly, compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory, a novel topology of cmos preamplifier latch comparator circuit is presented. considering trade - off between kickback noise and power dissipation, reference resistance value is optimized. according to the encode demands of different stage resolution, clock - control encode circuit is designed
其後，在具體的子adc設計中，對比各比較器類型的優缺點，並基於預放大鎖存快速比較理論，提出一種新型高速低功耗預放大鎖存比較器電路拓撲;根據adc系統所允許的參考電壓最大波動限制，在回饋噪聲對輸入參考電平的影響和功耗之間折衷，確定優化的參考電阻串阻值;根據不同級精度的編碼要求，設計出時鐘控制編碼電路。 -
The chapter of hardware design first expounds the whole design. the several primary circuit are designed, including power circuit, controlling circuit, detecting circuit and the dsp quadrature encode circuit
硬體部分先作了整體設計的論述，然後具體介紹了功率電路、控制電路、檢測電路以及dsp的正交解碼電路。 -
The input data of the multiplexing adopts 8 channels with the speed of 2mb / s, and those of the last two channels are " 0 " and " 1 " respectively, in order to improve the transimision effeciency and deminish the complexity of encode and electronic circuit concerned, furthermore, it makes the synchronous signal acquisition more easier
數字復接中採用八路2m口數據輸入，其中后兩路採用直接輸入「 0 」碼或「 1 」碼的方法，提高了信息傳輸的有效性，便於提取幀同步碼，降低了編譯碼過程的復雜性，同時也降低了系統的電路復雜程度。 -
The design and realization of the software & hardware communication system, which includes the pci interface circuit, sce - mi protocol and lvds transmission system. the simulation system is the core for whole system, we adopt standard bus interface mode and multiple state machine co - design. additionally, the control instructions for encode & decode state machine are discussed in detail
軟硬體通信系統包括pci介面轉接電路， sce - mi協議的設計實現和lvds傳輸系統;驗證系統是整個系統設計的核心，採用了多狀態機協同設計和標準總線介面模型的設計思想，重點闡述了主控指令編碼/解碼狀態機的設計。 -
With performance of up to 900 million floating - point operations per second ( mflops ) at a clock rate of 150 mhz, tms320c6711 is fit to tackle with the problem. this thesis made a deep research on the h. 263 standard and the tms320c6711. we propose the plan of the software and the hardware for the realization of the h. 263 protocol which include the structure of the whole program, the c code of the key algorithm of the h. 263, the c code of some subprogram, and the circuit for image processing with the tms320c6711 as the processor. furthermore, we optimize some subprogram in common use to make the coding more quickly. we encode a video sequence with the tms320c6711dsk successfully, even if the compression rate is as high as 100, video effect we get after decoding the code stream is satisfying
首先系統地研究了h . 263協議編碼器的基本演算法，句法，碼流結構和tms320c6711dsk的原理結構以及ccs2 . 0的開發環境；在系統的軟體方面給出了總體流程圖，對于h . 263協議編碼器的某些核心演算法和子程序，給出了部分源代碼，對于dsp的各種代碼優化方法進行了討論，並且對代碼進行優化，從而在提高系統處理速度的同時減少代碼大小和內存需求量；硬體方面以tms320c6711為核心處理器，提出了基於tms320c6711的圖像處理平臺的硬體實現方案，並給出了原理電路圖；最後在tms320c6711dsk上成功對視頻數據進行高壓縮比（ 100倍以上）的編碼，對回傳的結果解碼后得到了令人滿意的效果。
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