fifo 中文意思是什麼

fifo 解釋
FIFO = first in first out 先進先出。

  1. Correspond to lifo and fifo operations on the stack

    對應的是對棧的lifo和fifo操作。
  2. Configurable fifo space for data handling of tx and rx

    模塊的通道數可配置
  3. Represents a first - in - first - out fifo collection of objects

    表示對象的先進先出( fifo )集合。
  4. We use sequence number of tcp to realize the fifo order

    Fifo序是借鑒tcp協議中序列號來實現的。
  5. The order would have been the more typical fifo order, but a

    ,所以順序應當是典型的fifo順序,但是
  6. 2 does the supplier have an inventory control ( e. g. fifo )

    供應商是否進行庫存控制(如:先進先出) ?
  7. Uses autonomous dp fifo handshake mechanism

    自動握手機制
  8. First in, first out method fifo method

    先進先出計演算法
  9. Generic class offer fifo access

    泛型類提供fifo訪問。
  10. After that, qos management methods are introduced, including packet classification, congestion control and buffer queue management. several queuing principles are compared such as fifo queuing, prioritized queuing and weighted fair queuing. tail drop and active queue management are also introduced in this part

    同時對epon系統採用的qos管理策略做了詳細的闡述,分析了報文分類方法、擁塞管理策略、緩沖隊列管理策略,對比了fifo隊列、 pq隊列和wfq隊列等幾種主要的隊列特點,以及尾丟棄和主動隊列管理aqm的區別。
  11. At first we test and verify the communality between original design and data acquisition system with fifo cache ; then we quantitatively analyze the performance of data acquisition system with fifo cache, and the results are satisfied

    在數據採集系統的改進設計和實現中:首先對加入fifo緩存后數據採集系統工作的一致性進行了驗證;然後對加入緩存后系統的工作性能進行了定量分析得到了較為理想的結果。
  12. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端狀態機設計和低層驅動程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規模可編程器件的數字系統設計方法,針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  13. This paper discusses in detail some problems about scanning sound intensify mearusing system of the pc machine from perspectives of both hardware and software. it puts emphasis on analyzing and working out problem of multicenter data sampling in phase fifo amortize arbitrarness waveform generator this paper makes a deep discussion on the computer exteral interface technology which is developing in high speed. it analyses scanning sound intensify mearusing system interface technology on the basis of isa pci, and introduce the promising idea about designing mearusing system of scanning sound intensity by using usb interface

    本文針對快速發展的計算機外部介面技術進行了較深入的探討,分析了基於isa總線、 pci局部總線的掃描聲強測試系統介面技術,並提出採用usb介面的聲強數據採集與處理系統的設計思想,同時對windows底層進行了詳盡的分析,採用vtoolsd 、 vc + + 、 ddk編制的掃描聲強測試系統驅動程序,運行在系統核心( 0級環) ,並能與windows很好的協作運行,既能體現windows的多任務操作系統的特點,又保證了數據可靠、實時的採集。
  14. When solving the tna problem based on fleet dispatching commands, a stage - assignment algorithm is build to overcome the defect of fifo algorithm, which can be widely applied to cope with fixed job scheduling problem. 3

    在解決基於飛機調度指令要求的飛機排班問題時,本文提出的分階段指派演算法較好地克服了標號演算法的缺陷,該演算法能普遍地應用於處理類似的固定工件排序問題。
  15. Caused by the strict fifo service rule, hol cell block is the very disadvantage of the input - queued atm switches. to solve the problem, two things should be considered, that is the selection of scheduling strategy " and the decision of switch structure

    輸入排隊atm交換的最大問題是它的隊首( hol )阻塞,它是由於嚴格的fifo服務規則所引起的,在對該問題的解決上主要涉及兩個方面:調度策略的選擇和交換結構的確定。
  16. High precision ad chip is used for intermediate frequency data sampling and fpga of virtex - series is used for the implementation of intermediate - frequency orthogonal system, which includes the sequencing control design for mult - channel radar system with verilog, the application of ip core of digital filter and fifo, as well as the communication control module with dsp. as the master control part, the software programming for the communication between dsp and fpga is designed. the experimental result with hardware circuit shows the design is valid and practical

    採用高精度的adc晶元完成中頻采樣,通過virtex -系列fpga設計中頻正交系統,主要包括通過verilog語言實現多路雷達中頻接收的時序控制,通過濾波器ip核實現濾波器的設計,以及利用c語言實現dsp的通訊控製程序設計。並給出了fpga在資源和速度上一些優化的方法,調試過程中影響中頻正交接收性能測試的因素。
  17. Provide various cost calculation methods including standard costing method, fifo, lifo and average costing method

    提供多種貨品的成本計算方法:標準成本最後成本平均成本。
  18. In the design, we make use of two eda tools max + plus ii and protel99. because of the using of complex programmable logical device ( cpld ), we can keep untuched the original hard circuit in design and realization of counting card, so it inherited the advantage of its predecessor. in order to quantitatively analyze the performance of data acquisition system with fifo cache, we introduced the queueing theory to build mathematic model to test its quality

    在設計中藉助了max + plusii和protel99兩個eda設計軟體。由於採用了復雜可編程邏輯器件cpld ,使得在計數卡的設計和實現中不用更改原硬體電路,對原設計的優點有很好的繼承。在驗證系統改進性能時,引入排隊論建立了數學模型對系統的工作性能進行定量分析,證明其達到了設計要求。
  19. 16 the “ fifo ” was not conducted effectively, e. g. for 9037270, the product coming on 15 oct. was sent out, but coming on 08 oct. was still in warehouse

    目前通用產品9037270在一級受控發運狀態,但現場審核在成品庫發現該產品沒檢驗合格標識,出貨及在庫品沒綠色狀態標識。
  20. Though hdfs is stilled used in e, it can automatic stop when there are no more controls in activated state. 3. fifo edges

    通過純數據流調度器的自動關閉與事件激活機制,使得e語言可以在沒有數據可以處理的時候讓出cpu 。
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