frequency divider 中文意思是什麼

frequency divider 解釋
分頻器。

  • frequency : n. 1. 屢次，頻仍，頻繁。2. （脈搏等的）次數，出現率；頻度；【物理學】頻率，周率。
  • divider : n. 1. 劃分者；分割者；分裂者，離間者。2. 間隔物；分裂的原因。3. （割禾機等的）分切器；【數學】除數；除法器；【電學】分壓器；【航空】減速器。4. 〈 pl. 〉劃規，兩腳規，分線規。
  1. It was used as a frequency divider and no numbers are decoded from it.

    它被用作無解碼輸出的分頻器。
  2. N is the desired noninteger frequency divider.

    N為所要求的非整數分頻值。
  3. N is the desired noninteger frequency divider

    N為所要求的非整數分頻值。
  4. Variable division frequency divider

    可變分頻器
  5. Design of hardware consists of three pll loops, micro wave sample mixer, fractional - n frequency divider

    硬體電路包括三個鎖相環，取樣混頻器，分數分頻器的設計等。
  6. The pll consists of a crystal oscillator, a ring voltage - control - oscillator, a frequency divider, a phase / frequency detector, a charge pump and a loop filter

    設計的電路包括20mhz晶體振蕩器，鑒頻鑒相器，壓控振蕩器，固定分頻器，電荷泵和低通濾波器。
  7. This paper introduces the principle of the frequency division and presents the circuit design of the decimal frequency divider based on fpga. the vhdl language is used for the programming

    摘要介紹了一種基於fpga的小數分頻器的分頻原理及電路設計，並用vhdl進行編程實現，並對這種小數分頻器的抖動進行分析和計算。
  8. In the sub block circuit design, the contents that the author had introduced include : the principle of band gap voltage reference and the design technique in low power supply ; the analysis of spike pulse noise rejection, frequency divider and dead time in oscillator and control circuit ; the selection of the width and length ratio of four switches and 2x / 1x mode change point in driver and mode selection circuits

    在子電路設計中，作者比較深入分析的內容有:基準電路的原理及低電源電壓下基準電路的設計;振蕩器和控制電路中尖峰脈沖噪聲抑制、兩分頻電路及死區時間設定;驅動及模式選擇電路中開關管的寬長比的選擇及模式轉換點的設計。
  9. One is based on vco, and the other is based on frequency divider. the advantages and disadvantages of them are discussed in the thesis. furthermore, a method of realizing dead time changeable circuit is given, which makes the designed driving circuit have more latitude when it is used

    此外，論文還設計了兩種驅動信號產生電路，一種基於vco ，另一種基於振蕩器和分頻器，並對比了兩者的優缺點;給出了一種死區時間可變的電路實現方案，使所設計的驅動電路使用時具有更大的靈活性。
  10. Verification regulation of high voltage divider at power frequency

    工頻高壓分壓器檢定規程
  11. Through the research of direct digital synthesizer ( dds ) used as a divider in phase lock loop ( pll ), a frequency synthesizer with small frequency resolution ratio and high purity frequency spectrum can be realized

    摘要通過對直接數字合成器在鎖相環路中作為分頻器應用的研究，使頻率合成器可以在實現超細頻率解析度的同時達到高的頻譜純度。
  12. Dual frequency 1 in 8 out divider

    雙頻1進8出分配器
  13. Vfsd ertex frequency stream divider

    頂點頻率流分隔
  14. The factors that affect the frequency response of a capacitive divider were studied carefully. a coaxial voltage capacitive divider with an umbrella probe and a low - voltage circuit was presented. experiments shown that the frequency response of our probe is better than others of such dividers

    本文分析了影響電容分壓器響應的因素，探討了傘式探針的性能，設計了以傘式探針為基本結構的同軸電容分壓器，提出了測量不同信號的兩種i 。
  15. Based on mechanical vibration theory, with the torque divider ' s structure unchanged, there exist two kinds of approach to reduce the resonance : one is keeping the bending vibration frequency away from the excitation frequency, the other is increasing the modal damp

    根據機械振動理論，在不改變分動器結構設計的條件下，採用兩種方法降低螺栓共振響應：一種是將彎曲模態頻率移出激勵頻帶；另一種是提高彎曲模態的阻尼比。
  16. The fourth, mainly talk about the phase noise in the pll, and discuss the specific affect on out put phase noise caused by different components in frequency synthesizer, such as mixer, amplifier, multipler, divider, oscillator, phase detector etc. the last part is about how to choice the natural frequency of pll in order to get the better performance in phase noise

    第二章從鎖相環的基本原理出發，介紹了鎖相環的幾個基本部件:鑒相器?環路濾波器和壓控振蕩器，對線性化鎖相環進行了詳細的分析，對數字鎖相環做了詳細的介紹，分析了鎖相環的相位噪聲模型，討論了頻綜中的混頻器
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