gate circuit 中文意思是什麼
gate circuit
解釋
門電路選通電路-
Detail specification for electronic components. semiconductor integrated circuit ct54h20 ct74h20 dual 4 - input positive - nand gate
電子元器件詳細規范.半導體集成電路ct54h20 ct74h20型雙4輸入與非門 -
Detail specification for electronic components. semiconductor integrated circuit. ct54ls00 ct74ls00 quadruple 2 - input positive - nand gate
電子元器件詳細規范.半導體集成電路. ct54ls00 ct74ls00型四2輸入與非門 -
The device sends out various random disturbance signals to the balancing valve circuit of the hydraulic system for the radial head check gate operating at the worst condition by using a computer
模擬實驗裝置根據工況最為惡劣的弧門啟閉機液壓系統的平衡閥迴路製作，採用計算機隨機給出各種干擾控制信號。 -
By comparing and analyzing the advantages and disadvantages of three kinds of voltage reference circuits, type of current density ratio compensation 、 weak inversion type and type of poly gate work function, a cascode structure of type of current density ratio compensation is chosen to form the core of voltage reference circuit designed in this paper. applying the negative feedback technology, an output buffer and multiply by - 2 - circuits are designed, which improve the current driving capability
然後通過比較和分析電流密度比補償型、弱反型工作型和多晶硅柵功函數差型三種帶隙電壓基準源電路結構的優缺點，確定了電流密度比補償型共源共柵結構作為本設計核心電路結構，運用負反饋技術設計了基準輸出緩沖電路、輸出電壓倍乘電路，改善了核心電路的帶負載能力和電流驅動能力。 -
The paper introduces the performance parameters and the fundamental principle of gate drive circuit, and compares the features of igct, gto and igbt
論文介紹了igct器件性能參數、門極驅動電路的基本工作原理，對igct 、 gto和igbt的特點進行了對比。 -
The level adjustment circuit 100 lowers the clock signal input to the first clock terminal ck1 by a predetermined value from h level and provides the signal to the gate of the transistor q5
電平調節電路100將送往第一個時鐘終端ck1的時鐘信號從h電平降低一個預定值，並將此信號送往晶體管q5的輸入端。 -
During the circuit design, the author analyzed the basic principle of the direct current motor, pwm control, h - bridge power driver, and two control techniques of h - bridge power drive circuit, designed its general structure, so the feasibility of the design is confirmed. then, reference, oscillator, power dmos gate drive circuit ( charge pump, bootstrap ), and dead time generation circuit are designed and analyzed in the sub - circuits. a current - controlled oscillator is presented in this thesis
在電路設計中，作者介紹了直流電機的工作原理和數學模型、脈寬調制（ pwm ）控制原理、 h橋電路基本原理和h橋功率驅動電路的兩種控制模式，設計了驅動電路的總體結構，給出了電路的功能模塊，確定了設計的可行性，然後在子電路模塊中，重點分析設計了基準源電路、振蕩器電路、高端功率管柵驅動電路（電荷泵及自舉電路） 、低端功率管柵驅動電路和死區時間產生電路。 -
A particular over - current protection and drive circuit is given, the impact of resistance between gate and emitter on gate voltage dropping is discussed, and an adjustable gate - emitter resistance circuit is put forward
設計了過電流保護驅動電路，討論了柵射集電阻對降柵壓過程的影響，並提出一種可變柵射集電阻電路。 -
We analyzed the dependence of equivalent circuit parameters of mesfet switch on material and device structure. for modeling, we designed and fabricated six set of mesfet switches with different gate width, then measured their performance and extracted switch model parameters. mesfet switch database corresponding to the mmic product line is then established, and using the dependence of switch model parameters on gate peripheral we can attain the mesfet switch performance with any gate width through parameters scaling
移相器電路採用gaasmesfet開關作為控制元件，研究了mesfet開關等效電路參數與材料和器件結構參數的關系，設計製作了不同柵寬的六組mesfet開關，並進行參數測試和模型參數提取，建立了相應于mmic工藝線的mesfet開關模型庫；根據開關模型參數隨柵寬的變化規律，可以實現任意柵寬mesfet開關的參數定標工作。 -
Abstract : this paper summarizes flux - gate phenomenon and its composition, and concretely introduces the principle, circuit and applying method in guidance system of pendulum biaxial flux - gate compass
文摘:文章概述了磁通門現象及磁通門系統的構成，具體介紹了二軸磁通門、羅盤的原理、電路及在導航系統中的應用方法。 -
The teaching difficulty of the course of digital circuit basis mainly focuses on some knowledge of components, for example, semiconductor basis, separation and integration logic gate circuits
摘要《數字電路基礎》課程的教學難點主要集中在半導體基礎、分立和集成邏輯門電路等元器件知識部分。 -
The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module
數據採集模式實現部分的大部分工作是在前面板上完成的，後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四塊電路:符合電路，數據流控制器電路， sdram陣列和系統總線介面電路組成。後面板採集卡從總體物理上主要有四塊電路組成: 485串列通信電路， adc控制電路，心電數據處理電路和門控信號產生電路。 -
Xing su ( microelectronics and solid state electronics ) directed by prof. lin chenlu the fast development of information technology requires integrated circuit to be greater integrated, faster functioned, and lower power - consumed, that lead to continuous shrinkage of mos and dram feature size. and under this trend the thickness of mos gate dielectrics ( sio2 ) would soon scale down to its physical limit
日益增長的信息技術對更高集成度、高速、低功耗集成電路的需求，驅使晶體管的尺寸越來越小，隨之而來的問題是作為mos柵氧化物和dram電容介質的sio _ 2迅速減薄，直逼其物理極限。 -
The digitizer based on pxi bus uses fpga ( field programmable gate array ) to implement 256 points, radix - 2 dit fft ( fast fourier transform algorithm ). the design uses pipelining for fft processing and can accomplish sampling and processing signals of two channels at the same time. in the signal acquisition circuit, - a / d convector is used to enhance the precision of the signal sampling
在本設計中，採用fpga （ fieldprogrammablegatearray ）實現了256點基2dit演算法復數fft （ fastfouriertransformalgorithm快速傅氏變換演算法）處理器，具有較高的速度和運算精度fft ，設計採用流水線處理方式大大的提高了處理速度，可實現對兩個通道輸入信號的并行採集與處理。 -
Finally, flexible programming gate arrays ( fpga ) based circuit frameworks for main components of ofdm synchronization are given
最後基於現場可編程門陣列（ fgpa ）實現給出了ofdm同步主要模塊的電路結構。 -
Sorting algorithm can solve logic gate circuit for more fanout, more loop nestification and feedback alternately. we sort these nodes according to their joint relationship by the sort algorithm that can determine the priority order of digital circuit simulation and give the feedback chain
排序演算法可以解決具有多扇出、多迴路嵌套及交叉反饋的邏輯門電路，按照其連接關系進行排序，並給出其中的最大反饋鏈。 -
In order to enhance the applying efficiency of cl, the cause of premature convergence in binary - coded genetic algorithms ( gas ) is analyzed in this dissertation. the drawback of conventional mutation operator in preventing premature convergence is subsequently pointed out. whereafter, a genetic algorithm, which can be implemented via general logic gate circuit, is proposed
為了提高計算智能的應用效率，本文分析了二進制遺傳演算法中早熟收斂的成因，指出了傳統的變異運算元在防止早熟收斂方面的不足，提出了一種能有效預防早熟現象的二元變異運算元，並在此基礎上提出了一種便於用常規邏輯門電路實現的遺傳演算法。 -
A high - speed sampling system for echo signal of impulse gpr based on equivalent time sampling method is presented, and significant circuits including step sampling pulse generator and sampling gate circuit are designed
摘要提出了一種基於等效時間采樣方法的沖擊型探地雷達回波信號高速采樣系統，設計實現了等效時間采樣的關鍵電路，包括步進采樣脈沖發生器、采樣門電路。 -
The pulse neutron generator " s delaying time are measured by the time - amplitude converter and multichannel pulse amplitude analyzer. according to these times, the linear gate circuit " s opening time can be adjusted
用它和多道脈沖幅度分析器配合測量脈沖中子發生器發射中子的滯后時間，據此調整線性門電路的開門時間。 -
After this amplifier develops successfully, add to multichannel card and linear gate circuit which teacher develops, experiment to the standard source and the sample coal, this amplifier may realize to analyzing accurately to the coal ingredient, we have already used it about two years, it proves this amplifier has the good
該放大器研製成功后，配合導師研製的多道卡和線性門電路，對標準源、樣品煤試驗。該放大器可以實現對煤質的精確分析，現已連續使用二年多，證明該放大器具有良好性能，達到了預期設計要求。
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