hardware compiler 中文意思是什麼

hardware compiler 解釋
硬體編譯程序
  • hardware : 1 五金器具;金屬製品。2 (計算機的)硬體;(電子儀器的)零件,部件;(飛彈的)構件;機器;計算機...
  • compiler : n. 1. 匯集者,編輯(人)。2. 【計算機】自動編碼器;自動編碼[編譯]程序。
  1. An emulator is a software or hardware approach to emulate a hardware platform on other platform. jit ( just - in - time ) compiler is widely adapted to speed - up emulation, which compiles the instruction of the source platform into target instruction on - the - fly

    由於硬體平臺的不同,一個高效的模擬器可以採用即時編譯器( just - in - timecompiler )技術,即時的把源機器指令編譯成目標機器指令運行。
  2. The intermediate code created by the compiler is very compact and is propitious read by the running system because the paper uses reverse polish representations, hi the simulative running system, the paper uses the hardware plc principles and the oo method to white the running program

    中間代碼採取了逆波蘭表示法,這使得生成的代碼比較緊湊,且有利於運行程序的讀取。在模擬運行部分,本文利用硬plc循環掃描的工作原理,結合pc環境下的特點,用面向對象的方式編寫出了模擬運行程序。
  3. Then, a new design automation methodology is put forward which uses uml for specification, systmec for simulation and synopsys tools ( cocentric systemc compiler ) for hardware synthesis. the main feature of this methodology is its high possibility of implementation

    提出了一個基於uml系統描述的, systemc模擬驗證的,利用cocentricsystemccomplier進行硬體綜合的自動化設計方案,這個方案最大特點是可實現性強。
  4. The compiler passes profiling requests as a few bits of information in branch instructions to the hardware, and the processor executes profiling operations asynchronously in available free slots or on dedicated hardware

    人們越來越把興趣放到了運行時用實際輸入數據進行文件配置和優化上。這樣,這個程序就可以在運行時進行再優化,以適應「階段」的改變。
  5. Spca720a is a mips instruction system ic, and is support the gcc compiler in the linux, so in the transplanting process of c / os, we choose mips instruction to accomplish the hardware - related part in the c / os

    由於我們所使用的spca72oa晶元是一種mips指令系統晶元,它支持linux下的gcc編譯器,所以在對卜c / 05的移植過程中,對于協c / 05中與cpu硬體相關部分,我們採用mips指令來完成。
  6. Parallel processing technique deals with many aspects. it includes hardware technique, parallel architectures, parallel operating system, parallel languages, parallel compiler, parallel software, parallel algorithm, etc. but the current international situation is that the development of parallel algorithm is far more behind other architectures. the most dominating appearances are the lacks of corresponding software, the rational distributing of tasks, the communications and the synchronization

    雖然使用范圍很廣,但目前國內外的并行演算法應用研究明顯地滯後於其體系結構的發展,許多方面尚處于探索階段,技術上還不是很成熟,其中最主要的表現就是配套軟體的欠缺,任務合理分配的問題和通信與同步的問題。
  7. Ixp c, as a parallelizing compiler, is designed aiming at parallel maximization in the sequentially semantic applications by parallelizing them and mapping them to the hardware units of the network processor, which abstract away most of the hardware details for programmers to let them focusing on logics of the programs, facilitates the development of high performance network applications executing on network processors, and thus brings good portability and expandability for the programs

    它將串列語義的程序并行化,並適當的映射到網路處理器的硬體架構上。這一特性為網路應用程序的開發者屏蔽了網路處理器的硬體細節,使其僅關注于網路應用程序本身的邏輯。這便利了網路處理器之上的高質量高性能的網路處理程序的開發,並使其具有良好的可移植性與可擴充性。
  8. The proposed algorithm - hardware mapping models can be used in optimal design of real - time signal processing system. they can also be used in automatic optimized compiler of vliw dsp

    提出的演算法-硬體映射方法可以用於指導實時信號處理系統的最優設計,也可以用於研究vliwdsp的自動優化編譯系統。
  9. Reducing energy consumption of computer systems through software optimizations can well compensate the additional cost of assistant hardware. compiler - directed reconfiguration of the hardware sources or tuning of the parameters of the hardwares can reduce the wasted energy consumption efficiently, such as dynamic voltage scaling ( dvs ) and turning off unused system units ( tosu ) and so on

    從軟體方面降低系統的功耗可以很好地彌補僅從硬體方面降低功耗的不足,使用編譯器動態調整硬體的執行可以很好地達到降低功耗的目的,例如編譯指導的動態電壓縮放( dynamicvoltagescaling )和功能部件關閉( turningoffunusedsystemunit ) 。
  10. 2. support self - defined algorithm support self - defined algorithm of c high - level language, granddog compiler tool enables developers to compile their own algorithms rapidly and introduce them into the hardware, self - defined algorithm will be executed in the hardware and upper level software will call self - defined algorithm through corresponding interfaces, it is therefore highly secure

    支援類c高階語言的自定義演演算法,開發商可以使用宏狗編輯工具快速的編寫自己的演演算法,然後導入到硬體中,自定義演演算法在硬體中執行,上層軟體通過相應的介面進行調用自定義演演算法檔,具有很高的安全性。
  11. On the software side, compiler inserts prefetch instructions explicitly ; on the hardware side, an sma cache filter is added to cut down unnecessary prefetch. 4 guided by feedback - based optimization strategy, the paper presents a dynamic profile based continuous optimization framework - smarcof

    4研究了基於動態輪廓信息的軟硬體聯合持續優化機制,並在dlx模擬器的基礎上設計並實現了一個完整的指令級模擬平臺和基於上述優化規則的編譯框架smarcof 。
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