hardware digital processing 中文意思是什麼

hardware digital processing 解釋
硬體數字處理
  • hardware : 1 五金器具;金屬製品。2 (計算機的)硬體;(電子儀器的)零件,部件;(飛彈的)構件;機器;計算機...
  • digital : adj. 1. 手指的;指狀的。2. 數字的,數據的。n. 1. (鋼琴等的)琴鍵。2. 手指。
  1. The hardware mainly consists of three parts : signal pre - amplifying and conditioning circuit is used to amplifying the microseismic signals which have detected, signal processing and target identifying circuit based on singlechip is used to convert the analog signals which have been amplified to digital signals and go through signal analysis, processing to identify the moving target, the sending and receiving setting is used to send the identifying result to the decision - making and he can take relevant action according to the result

    硬體主要由三部分組成:信號調理電路對檢測到的微弱地震動信號進行放大;基於單片機的信號分析與目標識別電路將放大后的模擬信號進行a d轉換,進一步將得出的數字信號分析、處理,實現目標識別;識別結果發射與接收裝置將識別結果發射給決策者,由其根據接收結果採取相應的措施。
  2. Digital image processing consume a large amount of memory and time commonly. basing on the advantage of fpga, the paper design harware module by hdl ( hardware language ), i. e., some function is achieved by les ( logic element ) of the fpga. the real - time of digital image processing is achieved by this. the sample and display of digital image is the important part. so, the paper mainly design the sample and desplay module. the sample card is designed and it ’ s word mode is configured according china ’ s cvbs ( composite video bar signal ). for acquiring the image and storing it correctly to sram, the paper design the sample - control module. the sample module can work correctly using least time. the reliability and real - time achieve the reference. according the vga principle and scheduling of the ths8134, the paper design a vga - control module by hdl. firstly, the control signal is synthesized secondly, the horirontal and vertical synchronization signals is synthesized according to the vga interface standard

    圖像處理的特點是處理的數據量大,處理非常耗時,為實現數字圖像的實時處理,本文研究了在fpga上用硬體描述語言實現功能模塊的方法,通過功能模塊的硬體化,解決了視頻圖像處理的速度問題。圖像數據的正確採集和顯示輸出是其中的兩個重要的模塊,因此,本文主要完成了圖像數據的採集和顯示輸出的設計。本文設計了採集卡,並要對其工作模式進行了配置和編寫了採集控制模塊,在採集控制模塊的控制下,將數字圖像數據正確無誤的存儲到了sram中。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. A digital automatic ultrasonic inspection system designation is introduced. this system was developed with pc computer and embedded dsp, combining computer software and hardware, ultrasonic nondestructive testing, digital signal processing, embedded rtos and visual instruments technology. it meet the requirements of automatic inspection such as high repetitively frequency and real time alertation

    該方案以pc機和dsp系統為核心構成主從機系統框架,以基於虛擬儀器思想的pc機應用程序和基於dsp的嵌入式實時操作系統構成雙重軟體結構,把傳統的超聲波無損檢測技術和先進的虛擬儀器技術、數字信號處理技術、嵌入式實時操作系統、計算機介面通信技術相結合,從而滿足了自動化探傷中1k / s的重復頻率和實時報警的要求。
  5. This dissertation mainly studies the hardware system realization of the radar multi - waveform digital pulse compression processing system in frequency domain

    本文主要研究雷達多波形頻域數字脈沖壓縮系統的硬體系統實現。
  6. With the rapid development of the carrier phase differencing technique and digital signal processing hardware, it is possible to implement real - time processing of gps based attitude determination system

    隨著載波相位差分技術和數字信號處理硬體的快速發展, gps姿態測量的實時處理成為可能。
  7. The controller hardware is composed of digital signals processing ( dsp ) system performing scr fire pulses control and mmi system providing input and output interface. dsp system and mmi system are connected by serial communication

    控制器的微處理系統採用雙微處理器結構,負責脈沖控制的dsp微處理系統和負責人機操作的微處理系統相互獨立,通過串列通信連接。
  8. In the beginning, the working principle, testing and data processing system of pdl micro - control material test machine is introduced ; then more attention is paid to the hardware system which is composed of high precision raster linear displacement sensor, high precision force sensor, the digital displaying sets, the interface equipments and the controlling circuits etc to perform the data collection and ensure the testing precision of the whole system

    論文首先介紹了pdl材料拉伸試驗機的工作原理、測試及數據處理系統;接著詳細介紹了由高精度光柵線位移傳感器和壓力傳感器、數顯裝置、介面裝置及控制電路等組成的新的硬體系統,來完成數據採集,並保證整個系統的測試精度要求。
  9. The importan charateristics of wat902h camera and pci 500 camera and methods of capturing video are also included in this paper. imaging computer outside submarine can transfer data between control computer in the submarine by w2k ' s tednal service with highspeed. due to specific charaeristics of undersea optical imaging, underwater imaging processing technique fall into two categoriesfhardware and software, hardware are the design of the lenses used in waer and the choice of high - quality ccd caxner4the other is compllter digital irnage processing, that is mainly gray - level boformation and image sharpening. underwater image - processing software is designed on the basis of image processing on windows avi digital video file

    由於水下光學成像的特殊性,水下圖象處理技術應該包括硬體和軟體兩個方面,硬體即水下專用成像鏡頭的設計與高性能的ccd選擇,後期圖象處理軟體是利用計算機數字圖像處理技術提高水下拍攝圖象的質量,處理方法主要有灰度變換和銳化處理;實現了對windowsavi數字視頻文件文件的圖像處理技術,並在此基礎上完成了水下電視系統圖像處理軟體的設計。
  10. In this paper what is mainly discussed is the hardware implementation of the two application specific information processing modules by cpld or fpga, which are s + p inverse transformation, the inverse transform module of an image compressing system, and 4096 - point complex fft / ifft module, the central module of the digital pulse compressing system

    本文討論的就是應用cpld fpga來實現兩個專用信息處理模塊的設計。它們分別是圖象壓縮系統的圖象反變換模塊? s + p逆變換模塊及數字脈沖壓縮系統的核心模塊? 4096點fft變換模塊。
  11. The design of hardware module includes a / d converter, ddc ( digital down converter ), duc ( digital up converter ) and dsp. the design and application of ad6640 and ad6624 are fully discussed in this part. the design of software module includes the parameter design for ddc filter and the base - band signal processing of dsp

    收發信機硬體設計主要包括: a d 、 d a轉換器、數字下變頻器( ddc ) 、數字上變頻器( duc )以及dsp ,論文詳盡介紹了a d器件ad6640 、 ddc器件ad6624和dsp器件tms320c5410的設計和應用;收信機軟體設計主要包括: ddc濾波器參數設計和dsp的基帶信號處理,給出了dqpsk調制、解調演算法的dsp實現。
  12. This paper focuses on the design and implementation of intelligent hybrid - bus data collecting and processing system. based on one - wire techniques and its digital sensors, a hybrid - bus system is designed ; then with field - bus techniques, a lonworks hybrid data collecting system is constructed for the monitoring of distributed targets ; in order to realize real - time measurement and control on large - scale distributed system, gprs sms technique is adopted for the realization of the wireless data collecting system ; moreover, in order to improve the efficiency of control systems, a method of designing intelligent hybrid data collecting system is proposed based on multi - agent theory, and the multi - agent model and hardware structure are also discussed in detail with the fusion of one - wire and fieldbus techniques

    本文對基於混合總線技術的網路化智能數據採集與處理系統的設計與實現方法進行了研究:利用單總線技術和單總線數字傳感器,設計了基於單總線的混合總線網路數據採集與處理系統;利用現場總線技術,設計了基於lonworks的混合總線網路數據採集與處理系統;為了實現大規模分散目標的實時測控,利用gprs簡訊息技術設計了無線智能數據採集與處理系統;為了優化控制系統的性能,基於agent理論,提出了融合單總線技術和現場總線技術的多agent混合總線智能數據採集與處理系統的模型及其硬體實現方法。
  13. Thirdly, we study several ground clutters elimination algorithms combining the properties of ground clutters and we get the conclusion that the frequency domain algorithm has better performance through extensive analysis and comparison. finally we proposed a typical pd weather radar digital signal processing system realization project including the software and hardware implementation

    本文還結合氣象雷達地雜波的特點詳細研究了各種濾除地雜波濾波演算法,在對各種濾波演算法進行分析和折中考慮之後,選擇地雜波頻域濾波演算法應用於本信號處理系統。
  14. In the first part of this paper, different kinds of usual network architecture of parallel - processing multi - processors are studied. based on adsp - 21160 serial digital signal processors from ad company, close - coupled flexible hardware network architecture is selected as the network architecture of the system, because of which the hardware logical architecture of the system can be recomposed on line according to the acquirement of different algorithms

    本文第一部分研究了各種常見的并行處理網路結構,基於ad公司的adsp - 21160系列數字信號處理晶元,選擇緊耦合的柔性硬體結構作為該系統的并行處理結構,使得系統的硬體邏輯結構可以根據演算法的要求在線重組。
  15. The dsa image processing system which the author have developed can be used as the image processing prototype model in the digital subtraction angiography system, according to the new arithmetic achieved by software it can be changed to hardware implement to the whole - one dsa system, on the other hand, it can be directly applied to the reconstruction of old x - ray machines to the new dsa system and based on this system, more applications on dsa can be developed

    本研究的成果可以作為數字剪影血管造影系統中數字圖象處理部分原型系統,一方面可以根據研究成果和演算法轉化為硬體實現方式應用於數字剪影血管造影dsa一體機中,另一方面可以直接應用於將現有x光機改造成為數字剪影血管造影系統,同時在此系統的基礎上可以開發出更多的數字剪影血管造影的應用。
  16. This paper research the principle of two dimensional collimator system in which the area - array ccd, cpld circuit and dsp chip are used. digital acquisition and processing hardware and software were designed. the test result was given

    本文研究了用cmos作為接收器件,用cpld電路和dsp晶元進行系統流程式控制制和數據處理的二維變形測角儀的系統原理,設計了數據採集、處理的硬體軟體,並進行了實驗。
  17. In this project, the author is responsible for the hardware design of fpga and debug of hardware and software. this thesis analyzes the digital signal processing algorithm of the responder and its realization in detail

    論文詳細分析了接收機信號處理演算法在fpga中的硬體實現方案,在提高系統可靠性、穩定性以及fpga約束文件設計方面做了較深入的探討。
  18. Only by digital down converter, the data processing work which used to be handled by hardware can be done by software. this paper discusses the realization of digital down converter in detail, the main content is listed as following : 1

    經過數字下變頻處理,中頻信號被下變頻至軟體可以處理的零中頻,是實現用軟體來完成原來需要硬體完成的工作的關鍵。
  19. In this paper, some theories about intelligent instrument, dsp ( digital signal processing ) technology and the method of measure the electric power under the influences of harmonics is first of all described. and then it focuses on discussing the design and development of hardware and software

    論文首先對本次設計所依據的智能儀器、 dsp技術以及高次諧波影響下的電壓、電流有效值及其他電參數測量原理進行了理論闡述,然後著重從硬體、軟體兩個部分論述了整個儀表系統的設計與實現。
  20. In chapter2, the architecture of software radio is discussed from the point of receiver, several technology solutions and their advantage & defect are analyzed. at last three receiver modes are introduced simply. chapters expatiates on the design and implementation of if digital processing segment, introduces in details the schemes of system hardware and system software separately

    第二章主要從接收機角度詳細討論了軟體無線電的體系結構問題,比較分析了軟體無線電幾種潛在的技術實現方案及各自優缺點,對軟體無線電接收機的三種數學模型:單通道接收機、多通道接收機和多相濾波器通道化接收機進行了簡單介紹。
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