high low bias test 中文意思是什麼
high low bias test
解釋
高低限測定-
In addition to the dram array, the logic circuitry with the body - bias - controlled soi transistors has been developed for high - speed operation. combine some new techniques for power reduction and our dram array, we design a new low - power soi cmos dram structure and study the performance of our circuits. the results we got in the simulation and test are valuable
第三種,為了簡化soi材料的電學性能測試結構,使它的測試,分析,計算摘要與傳統的mos模型相兼容,我們通過引入一個耦合因子,將傳統的mos模型的測試方法,公式引入soi材料的c v , i刁測試過程。 -
Test, high - low - bias
高低偏壓測試
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