high order logic 中文意思是什麼

high order logic 解釋
高階邏輯
  • high : adj 1 高的〈指物,形容人的身高用 tall〉;高處的;高地的。2 高級的,高等的,高位的,重要的。3 高尚...
  • order : n 1 次序,順序;整齊;(社會)秩序,治安;狀況,常態;健康狀態;條理;會場秩序;議事程序,日程;...
  • logic : n. 1. 邏輯,理論學。2. 推理[方法];邏輯性,條理性。3. 威力,壓力,強制(力)。
  1. It is arranged in order with high logic and contrast comparison. it is one of excellent required reference books of scientific popularization of oral cavity and therapy

    層次分明,排列有序,邏輯性強,對比強烈,是一本口腔科普和接診都不可或缺的優秀的工具書之一。
  2. Due to the fact that the structure of internal combustion engine is complex, fault diagnosis cannot be made in a single way and human intelligence diagnosis technique making use of information interinfiltrate and neural network and fuzzy logic and expert system must be adopted in order to obtain high accuracy and real time

    由於內燃機結構較為復雜,因此只用單一方法對它進行診斷是不夠的,必須藉助于信息融合、神經網路、模糊邏輯以及專家系統等人工智慧技術的計算機診斷方法,才能達到較高的準確性及實時性。
  3. The primary contents and innovations of this article are introduced below. in order to take advantage of the high speed of calculation, and at the same time, improve the accuracy and dynamic - range of the algorithm, three kinds of multi - input floating point adder algorithm ( fpa ) are summarized and a high - performance multi - input fpa structure is put forward with a self - defined floating point format. the performance of the high - performance structure on calculation speed and logic resource consuming is better than the normal structure

    論文的主要工作及創新點如下:為了充分利用fpga處理速度快的特點,同時盡量提高演算法的精度及動態范圍,本文在對浮點加法器演算法進行深入研究的基礎上,規納總結了三種不同的多輸入浮點加法器演算法,並創造性地提出了一種高效的多輸入浮點加法器結構及一種適合於fpga實現的自定義浮點數格式,這種高效的結構在所需的邏輯資源和運算速度上均遠優于傳統的多輸入結構。
  4. If the technicians applied technology in the wrong, even achieving the business logic, but probably leading to many vices including low performance, low scalability, close coupling, low software duplication. so how to assemble the j2ee technology reasonable and achieve a system with high performance and high expansibility is my research emphasis in the thesis. in order to solve the problems and implement efficient web application, the paper put forward ejs _ mvc model according mvc pattern and we can assemble component by using ejs _ mvc model, it can solve many problems of web application and improving system with clear flow and clear function partition, in addition, due to controller is the most importance in the ejs _ mvc model, so the thesis also discuss some problems about controller design ; if the model is not designed accurately, system performance will encounter fatal influence, so the article lucubrate ejb technology from ejb choice, ejb optimized design, database access, design pattern etc and bring forward some strategies and methods about how to build efficient business tier ; finally based on ejs _ mvc model, a example that contains simple business logic is developed according to the object - orient software engineering thinking and some strategies and methods proposed by the thesis, in the process of achieving system function, the emphasis is probing into how t o assemble and apply technology reasonable and providing a new thinking thread and method contributing to build high effective and flexible j2ee application

    由於j2eeweb應用是由組件組成,因此為了解決上述問題,實現高效的應用,本文首先從如何合理組合組件入手,找到一種方法使各組件能具體分工而又緊密合作,在深入研究各組件基礎上,根據mvc模提出了ejs _ mvc模型概念,指出可按此模型組合各層組件,該模型可以解決傳統web開發中存在的問題,而且具有系統流程與系統功能劃分清晰,可擴展性、可維護性強等優點,另外由於控制器是ejsmvc模型的重中之重,它起到承上啟下的作用,它設計好壞直接關繫到整個應用的性能、伸縮性與擴展性,因此又探討了控制器設計的有關問題;另外如果模型設計不當的話,對系統性能造成的影響可能是致命的,因此本文又從ejb組件選擇、 ejb調優設計、數據庫訪問和設計模式等方面對ejb技術作了全面的分析研究,指出在業務層中如何避免太多網路遠程調用和提高業務層性能,特別是根據前面的分析總結出了業務層的優化分層組合模型,這個模型的使用無疑會使業務層具有較高的性能與伸縮性;最後選擇一個業務邏輯較簡單的系統,使注意力集中到運用的j2ee技術上來,按照ejs _ mvc模型與軟體工程流程以及本論文所提出的方法與策略實現業務邏輯,在實現過程中具體探討如何合理運用組合技術,就多層j2ee體系結構的設計思想作深入的探討實踐,為實現高效、靈活的多層j2ee應用提供一種新的思路及方法。
  5. In order to resolve the contradiction between real - time and arithmetic complex in the television tracking capture system, the paper designs the real - time target track processing system which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    摘要為解決電視捕獲跟蹤瞄準系統中系統的實時性與演算法復雜性之間的矛盾,設計了以高性能的dsp晶元tms320c6416為核心處理器,結合大規模可編程邏輯器件cpld進行邏輯控制以及現場可編程門陣列fpga對採集的視頻數字圖像做預處理的實時目標識別跟蹤處理平臺。
  6. On the bases of detailing the control theory and circuit of dc - ac converter, this paper introduces the fuzzy logic theory into the control of the digital pwm converter. in order to realize the control strategy, intel high performance micro controller 80c196kc, the kernel of the intelligent controller are purposed

    本文在討論逆變器控制理論和控制電路的基礎上,將模糊控制理論引入到數字式pwm型逆變器的控制中,設計了以80c196kc為核心的智能控制器,用新型的基於eprom存儲的pwm電路給予實現的硬體電路。
  7. In order to improve reliability and simplify the hardware design, many new i2c bus elements were used to realize binary input, logic output, clock functions and storing settings and reports. by simulating i2c bus data transfer, the mcu realized writing and reading data from each element the whole hardware system ' s structure is compact and reasonable, and the device has high reliability, stability and immunity to disturbance

    從提高可靠性和簡化電路的角度出發,設計硬體電路板時使用了許多新型i ~ 2c串列介面器件, mcu用普通i / o口模擬i ~ 2c總線介面,由軟體模擬i ~ 2c總線數據傳輸過程,實現了開入開出、定值存儲、報告存儲和時鐘對時等功能。
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