idle frequency 中文意思是什麼

idle frequency 解釋
中心頻率;未調制的頻率。

  • idle : adj 1 懶惰的,吊兒郎當的。2 空閑的;【機械工程】空轉的。3 沒用的,無益的,無效的;【物理學】無功...
  • frequency : n. 1. 屢次,頻仍,頻繁。2. (脈搏等的)次數,出現率;頻度;【物理學】頻率,周率。
  1. Sy - kang shen, bor - chyun wang, ching - yin lee and tsung - chih lin, “ a modified qft design method for a cascaded multiple loop system and application in idle speed control ”, 1999 international symposium on quantitative feedback theory and robust frequency domain methods, pp. 25 ~ 41, university of natal, durban, south africa, august, ( 1999 )

    [ 22古碧源,李清吟,顏坤鴻,楊仲健,林春福, "二極體接地捷運直流供電系統之接地電位與雜散電流, "第十九屆電力工程研討會論文集,第677至681頁, ( 1998 )
  2. Further more, the thesis is based on the customer ' s accounts of the mianyang filiale, china unicom which is idle long time but it includes many information that is worth, just as the time, the frequency to talk of the customer. from this thesis we further understand the action of the customer and we do our plan surely, provide service abundant and then it benefits our company better

    更重要的是,本文通過對現有資源的整合、數據分析技術的引入、數據倉庫及crm的研究,有效利用了中國聯通綿陽分公司在電信業務運營的過程中積累的大量的用戶話單。長期以來,這些反映了用戶通話的時間、時長和頻率等重要信息的話單處于閑置狀態。
  3. It has been playing an important role in equipping all kinds of arms and services for campaigns, tactical exercises and emergent actions etc. based on the detailed analysis of the exchange ' s architecture and implementing, this thesis points out some disadvantages of the device, such as too many absolute components, not very high enough reliability and security, very large size and weight, operating and maintaining difficultly. considering low power requirement and man - machine interface optimizing design at the same time, the thesis come up with an integrated design scheme to the previous device based on " mcu + cpld / fpga architecture " : ( 1 ) signal frequency dividing, timing frequency producing, 20 customers " led states controlling are implemented in cpld ; ( 2 ) decoding, latching data and controlling signals are implemented in cpld by bus interface between mcu and cpld ; ( 3 ) chip selecting principles and mcu idle mode design are completed under the consideration of low power requirement ; ( 4 ) operation by chinese lcd menus is adopted in the man - machine interface

    本項目以該交換機為研究對象,在詳細分析原設備的系統結構和功能實現方式的基礎上,指出該機型在使用過程中存在技術相對陳舊、分立元件過多、可靠性和保密性不夠、體積大、重量大、維修困難等問題,同時結合系統的低功耗需求和優化人機介面設計,本文提出基於「單片機+ cpld fpga體系結構」的集成化設計方案:在cpld中實現信號音分頻和計時頻率生成電路、 20路用戶led狀態控制電路; cpld與單片機以總線介面方式實現譯碼、數據和控制信號鎖存功能的vhdl設計;基於低功耗設計的器件選型方案和單片機待機模式設計;人機介面的lcd菜單操作方式。
  4. In this paper, low power flip - flops designs by the reduction of the load of clock or the data path ; by the reduction of clock swing ; by the reduction of clock frequency and by the reduction of those idle transitions in cmos circuits with clock gating are discussed

    與此相對應的,在本論文中,分別對將少時鐘負載或數據通路的負載的觸發器設計;減小時鐘信號幅度的觸發器設計;降低時鐘頻率的雙邊沿觸發器設計以及應用門控技術來減少觸發器無效跳變設計的觸發器結構進行了討論。
  5. Also, the harmonic resonance frequency was lowered to that of below idle - allowing us to shut out the unwanted vibrations often caused by the twisting force generated by the engine during torque rate changes

    諧振頻率可以降到怠速以下,在轉矩變換期間由發動機扭矩產生的震動可以排除。
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