logic function 中文意思是什麼

logic function 解釋
邏輯功能
  • logic : n. 1. 邏輯,理論學。2. 推理[方法];邏輯性,條理性。3. 威力,壓力,強制(力)。
  • function : n 1 功能,官能,機能,作用。2 〈常 pl 〉職務,職責。3 慶祝儀式;(盛大的)集會,宴會。4 【數學】...
  1. Discussion of designing logic function method using msi data selector

    數據選擇器實現邏輯函數的方法討論
  2. Primary policy of design is sorting and distilling logic function block ? lfb first, then choose the language of configuration and lfb development for msr

    設計的主要方針是首先分類和提取出邏輯功能模塊lfb ,接著選擇msr使用的配置及lfb開發語言。
  3. Secondly, the paper describe the principle of atm network, and the function of ' sar " ( segmentation and reassembly ) and the format of packet aal5, and introduce the basic idea of ipoa, and the design project and implementing of the control chip. later, the paper introduce the logic function and operational principle of packet buffer control chip and prove the feasibity and correctness of the arithmetic. at last the paper introduce crc - 32 arithmetic based on look up and implement it with hardware

    接著詳細論述了核心路由器atm網路實現的原理,包括「 sar 」 ( segmentationandreassembly )功能和aal5報文的格式, ipoa基本思想,以及控制晶元的設計方案和實現途徑等。然後又論述報文緩存區控制晶元的工作原理和邏輯功能等,並對演算法的可行性,正確性等進行論證。最後介紹了一種基於查表的crc - 32演算法的原理及其硬體實現。
  4. Combination logic function

    組合邏輯功能
  5. The suggested control scheme fulfills automatic full range feedwater control by changing the structure and parameter of control system according to different stages of load, making full use of intelligent fuzzy logic function on conditons of remaining process system

    充分利用模糊智能控制系統的功能,在不改變工藝系統的情況下,從控制策略著手,隨工況的變化改變控制系統的參數,在鍋爐點火、升壓、並網、升負荷、降負荷全過程實現自動控制。
  6. By analogizing the concept of particle collides in high - energy physics, we proposed the particle model of logic function, and constructed the particle collide arithmetic of logic function predigest according to this model, finally using vc + + 6. 0 programming realized it

    摘要類比高能物理中粒子碰撞的概念,提出了邏輯函數的粒子模型,根據此模型構造了化簡邏輯函數的粒子碰撞演算法,並用vc + + 6 . 0編程實現。
  7. A rectangular diagram of a logic function of variables drawn with overlapping sub - rectangles such that each intersection of overlapping rectangles represents a unique combination of the logic variables and such that an intersection is shown for all combinations

    一種多變量邏輯函數(求值用)的方格圖,橫行表示一組變量(與取值) ,縱向表示另一組變量(與取值) ,重迭(相交)的方格表示若干邏輯變量的一種唯一的組合(與取值) ,而且表示了所有可能的邏輯變量的組合(與取值) 。
  8. 4. complete the design of system ’ s logic function with fpga. the sdram ’ s controller and ping - pong operation is studied, and the data ’ s continuous storage is also realized. 5

    4 .設計實現系統的fpga邏輯部分,並研究了高速大容量sdram控制器和進行乒乓存儲操作邏輯時序,實現了數據流的連續傳輸。
  9. Bdd ( binary decision diagram ) is the state - of - the - art data structure in logic function. it is widely used in the fields of computer science and digital circuit and system

    二元判決圖bdd ( binarydecisiondiagram )是邏輯布爾函數的一種高效表示方法,在計算機科學以及數字電路與系統等領域中有廣泛的應用。
  10. At implementation phase, based on the design policy, we first choose the language rose as msr language, analyzing the advantage of using the language rose. then we sort the lfb in msr according to the rose language specification, and particular define these five categories of lfb in rose language. in msr, we design forty kinds of lfb in all. finally, we especially list the design and implementation scheme of some important lfb, as the gre logic function block - - checkgreheader, greencap, stripgreheader and the logic function block for distribution operation - - splitfirst

    在實現階段,根據設計方針,首先選擇rose作為msr的語言使用,分析了使用rose的好處。接著我們對msr中的lfb按照rose語言規范進行分類,並在rose語言中詳細定義這五類lfb 。使用rose語言描述邏輯功能模塊。
  11. Other five tiers performed different logic function

    其餘五個層次分別實現不同的邏輯功能。
  12. Logic function of basic category in ideological and political education

    試析思想政治教育學基本范疇的邏輯功能
  13. 3 ) give the reduct algorithm and improved algorithm based on discernibility matrices. 4 ) give the algorithm of rules. 5 ) in this thesis, by using rs theory in the synthesis of combinational logic function, we can get minimal expression of logic function ; if by using rs theory in the rough control of boiler, we can get rough control rules

    對於前人提出的差別矩陣和差別函數的概念和定義,將其應用於信息系統中,用差別函數得到了最小約簡,然後,通過研究差別矩陣和差別函數的構造過程,提出了對差別矩陣降階和消元的策略,實例證明是有效的,起到了化簡差別矩陣和差別函數的目的; 4
  14. Logic function : every protection function and relay output possesses logic configuration function, can be set according to requirement of customer ; the switch quantity can implement non - electric quantity protection function through setting

    邏輯功能:各保護功能和繼電器出口具有邏輯組態功能,可按用戶要求進行設定;開關量可通過設定實現非電量保護功能。
  15. In this part, the function definition and structure partition are finished, then every part is depicted with verilog hdl. by verilog - xl tools, behavior simulation is achieved. the chip logic function that is encrypting 1024bit data is realized

    在設計的過程中,完成了整體的結構劃分,使用veriloghdl硬體描述語言進行了電路的rtl級描述,並利用了candence公司的verilog - xl完成了軟體平臺上的行為級模擬,實現了1024位數據的加密解密的邏輯功能。
  16. In multiple - valued logic theory, completeness theory of function sets is an important and fundamental problem, it is also the problem which must be solved in automata theory and multiple - valued logic network. the solution of this problem depends on determining all the precomplete classes in multiple - valued logic function sets

    函數系的完備性判定問題是多值邏輯理論中基本而重要的問題,同時也是自動機理論,多值邏輯網路中必須解決的問題,此問題的解決依賴于定出多值邏輯函數集中的所有極大封閉集(準完備集) 。
  17. In which, we use cubic symbol for describing the logic function of a network in well - balanced state, then use sharp - product operation for constructing disjoint minimal path set of network. and a dps algorithm for finding out the minimal path set is also presented

    研究了網路可靠性分析的不交和演算法,應用計算機輔助邏輯綜合技術實現最小路徑的不交化;並給出一個搜索網路所有最小路經的dfs演算法。
  18. The vxibus c - size and i, q channels are employed in this module design, and the sampling rate in each channel reaches 500mhz. the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ). the timing and logic function are fulfilled by fpga. after the disscusion of signal adjusted, the detailed scheme of this module design have been showed. in this design, there is much logic function design, and it is very strict with the hardware language program. so the basic flow of hardware program design and several very important methods of high speed logic function design, which is described by vhdl, are introduced. also, expatiated the inner modules structure of fpga for forepart circuit, the keystone and difficulties of the design. the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system, and it is very important. the timing simulating results of several pivotal modules are depicted. high - speed signal paths are terminated to match the characteristic impedance. the design undergoes integrity analysis and software simulation

    在本模塊的設計中,有著大量的邏輯設計,對硬體語言程序的編寫要求比較高,因此,文中介紹了硬體程序設計的基本流程,以及幾種基於vhdl硬體語言設計在高速邏輯設計中非常重要的方法。同時闡述了本模塊設計的前端fpga的內部模塊結構,設計的重點、難點,並給出了重要模塊的時序模擬結果。高速pcb的設計也是目前實現高速數據採集系統的難點和重點,文中詳細的闡明了高速pcb設計中的注意點,以及作者在設計本模塊時的經驗和心得。
  19. The standard expansions of an arbitrary logic function in these complete sets from the rm, crm are deduced, and two examples are proposed to discuss the relation between the expansions in boolean subtraction - xor, division - coincidence algebraic systems and the expansions in and - or - not algebraic system

    舉例說明了與-或-非代數系統中規范中規范展開式與布爾減-異或、布爾除-符合代數系統中的規范展開式之間的轉換。
  20. Tabular method of calculating boolean partial derivative and difference of the oc type logic function

    型邏輯函數的布爾偏導數與布爾差分的表格方法
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