loop noise bandwidth 中文意思是什麼
loop noise bandwidth
解釋
環路躁聲帶寬-
Loop noise bandwidth
環路躁聲帶寬 -
Many existing co dsl modems may only support a relatively narrow receive frequency range, which will increase the difficulty of estimating the much wider bandwidth far - end loop noise
許多已有的co （中心局） dsl數據機可以只支持相對較窄的接收頻率范圍，這會增加估計寬的多的遠端環路噪聲的難度。 -
It can be deduced from the characteristics of ilpll circuit that injection - locking bandwidth is not only related to the injection - locking bandwidth without feedback loop, but also related to the characteristics of frequency mixing, loop gain and the change of the loop phase. thus, the needed bandwidth can be obtained by adjusting the loop parameters. and the phase noise characteristics are mainly determined by loop transmission factor
由ilpll電路特性的推導得出:注入鎖定帶寬不僅跟開環時的注鎖帶寬有關，而且與混頻特性、環路增益以及環路相位變化相關聯，可以通過調節環路的參數得到所需帶寬;相噪特性主要由環路傳輸因子決定，可以通過調節環路濾波得到比開環注入鎖定相噪更優的特性。 -
A new if simulation signal digital model was developed, which has the ability to simulate the ocean return wave noise and the instrument thermal noise. by this simulation data, smle is successfully tested, and the rf ocean return wave simulator also worked correctly. it is difficult for altimeter to realize closed loop internal calibration with a large time - bandwidth product
（ 4 ）提出了雷達高度計海面回波中頻模擬信號的數字模型，該模型具有模擬高度計海面回波噪聲和儀器熱噪聲的功能；基於該模型的軟體模擬器成功的對高度計跟蹤器進行了驗證；同時，該模型模擬的信號應用於雷達高度計射頻回波模擬器也獲得了成功。 -
Design a kind of sub - optimum digital prefilter. through the simulation of timing recovery loop which is n ' t added prefilter and which is added prefilter, discuss the convergence characteristic and compare the relation between timing jitter and signal to noise ratio, the relation between timing jitter and noise bandwidth of loop, the relation between symbol error ratio and signal to noise ratio
通過對加預濾波器后的定時恢復環的模擬，討論了環路的收斂情況，比較了所設計的數字預濾波器和無預濾波器時環路定時抖動與信噪比、定時抖動與環路噪聲帶寬、誤碼率與信噪比的數量關系，證實所設計的數字預濾波器對減少定時抖動非常有效。 -
This paper introduces the principle of phase - locked loop and analyzes the performance characteristics of pll chip adf4106 which has wide bandwidth and low power consumption. and then introduces the design method of a kind of low phase noise frequency synthesizers which uses single chip processor to control the chip. the application supplies a good design method for high frequency synthesizer
介紹了鎖相環路的工作原理，分析了低功耗寬帶集成鎖相環晶元adf4106的工作特性，並介紹了一種利用單片機控制該晶元的低相位噪聲頻率合成器的設計方法，討論了環路濾波器的設計，為高頻頻率合成器的設計提供了很好的思路。 -
In the pll ' s design and debugging, the loop filter ' s design theory and the affect of the loop - bandwidth on the phase noise was focused on
在pll的設計和調試過程中，著重研究了環路濾波器的設計理論和環路帶寬對相噪的影響。
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