loop receiver 中文意思是什麼
loop receiver
解釋
環形天線接收機-
By complementing the proposed scheme with methods to estimate the fractional code delay, the acquisition unit an provide high quality delay estimates such that it can instead of the delay locked loop in the traditional ds receiver. after dispreading successfully, this dissertation introduces a method to estimate the doppler - shift directly from some samples based maximum likelihood estimation, and then revise it forwardly
在成功解擴之後，本文利用最大似然估計從l個樣點中直接估計出殘余多普勒頻偏，並進行前向頻偏校正，來代替傳統擴頻接收機中的科斯塔斯環，經模擬證明該方法的估計精度完全滿足解調的要求。 -
Transient electromagnetic methods ( tem ) can be called as time domain electromagnetic methods. the exploration equipments of tem include two units : transmitter and receiver. emission current falls down from i to 0 suddenly when step current passes through the transmitter loop
瞬變電磁探測需要發射的電流激勵信號要足夠強、功率足夠大，發射電流波形的關斷時間要求比較苛刻，而且發射部分還需提供實時監測發射電流、關斷時間，記錄電流下降沿等功能。 -
The principle and structure of pll ( phase - locked loop ), including fll and loop filter, are analyzed and described. the module of carrier synchronization in the all - digit ds - qpsk receiver was carried out in the fpga chip. the problem about the estimation and track of the correlative carrier frequency under high dynamic circumstances was resolved very well
針對某遙測遙控全數字接收機的研製，對相干載波同步中的鎖相環、鎖頻環、 dpll 、本地nco等進行了詳細的分析和優化設計，在fpga上實現了高動態全數字ds - qpsk接收機中的載波同步模塊，解決了大范圍和動態多普勒頻移下接收機的相干載波提取與跟蹤問題。 -
There are two uncertain factor about it : the phase of the pn code and the doppler - shift. after capturing the received signal successfully, the traditional ds receiver always uses a delay locked loop ( dll ) to synchronize the pn code and then uses a costas loop to realize the carrier synchronization. this complex closed - loop structure not only take long time to realize the synchronization, but also has the defect of “ hang up ”
傳統的擴頻接收機通常在捕獲偽碼信號后利用遲早門鑒相的延時鎖定環來實現偽碼的精同步，解擴后利用科斯塔斯環實現載波同步，這種閉環結構不僅同步時間長、結構復雜，而且鎖相環還存在所謂的「 hang - up 」現象。 -
The movement of the satellites causes doppler frequency to drift, the receiver usually tracks the signal frequency the receiver through phase locked loop, in order to can demodulate the signal
衛星運動造成多普勒頻率漂移，接收機一般都採用鎖相環來跟蹤接收信號頻率，以便能正確解調信號。 -
The phase noise in microwave receiver and the measured parameter of source frequency instability are described in this paper, and the technology of frequency - synthesizing and theory of phase locked loop ( pll ) are also briefly introduced
摘要闡述了微波接收機中的相位噪聲概念及本振源頻率不穩定度的實際測量參數，並簡要介紹了頻率合成技術和鎖相環路工作原理。 -
In the course of the design, critical technologies are applied, such as digital phase - locked loop, fast fourier transform algorithm, universal asynchronous receiver & transmitter, and so on. in the project, as a important component, the module of monitoring the buses " power quality takes a long time
在設計過程中，使用的關鍵技術有：使用cpld模擬多路sspc多種狀態；在對匯流條電能質量的監測過程中採用頻率跟蹤技術? ?全數字鎖相環；應用fpga技術使用fft運算進行諧波分析；通用異步收發器等技術。 -
For example, when the speed of transporting is very low, it is very difficult to track the receiver signal frequency through the common phase locked loop
如在傳輸數據速率較低時，普通鎖相環來跟蹤接收信號頻率則很困難。 -
It is necessary that the receiver tracks the acquired signals steadily and credibly to ensure the successful demodulation process. in this thesis, an improved tracking loop design method is presented which adopts self - adaptation parameters and varied bandwidth tracking technique to adapt to the input signals, and improves the acquisition and tracking performance
接收機穩定可靠地跟蹤被捕獲信號保證成功解調是必要的，本文介紹一種改善的鎖相環設計方法，這種方法採用自適應參數和變帶寬跟蹤技術來調整輸入信號改善捕獲和跟蹤性能。 -
Chapter one introduces the recent development of usb2. 0 and the overall architecture of transceiver interface ; chapter two proposes the design flow and design style ; chapter three presents the whole system and module partition ; chapter four emphasizes on the dual - mode transmitter circuit, and gives out the simulation waveforms ; chapter five focuses on the design of over - sampling receiver and dll ( delay locked loop ) module ; chapter six designs the band - gap reference circuit. in the end, it concludes the design, and estimates the trend of usb. the dissertation is emphasized on dual - mode transmitter architecture, implementation of high speed dll using dba ( digital - based analog ) technology and a new design methodology for complex digital modules in mixed - signal circuit
本文第一章介紹了usb2 . 0的發展現狀和收發器介面晶元系統；第二章介紹了該晶元的設計流程和風格；第三章介紹了該介面晶元的總體構架以及模塊劃分；第四章著重介紹雙模發送器電路設計並給出了模擬驗證波形；接下來第五章分析了過采樣接收器的設計並對其中的dll （ delaylockedloop ）模塊設計進行了詳細的分析；第六章介紹了本晶元內置的基準電壓源的設計；最後對本文的設計一個總的回顧和總結，並展望下一代usb的發展方向。 -
The major work is as following : based on the analysis of signal receiving problems when navigation receiver is in high dynamic circumstance, some typical algorithms such as maximum likelihood estimator ( mle ), extended kalman filter ( ekf ), frequency lock loop ( fll ), digital phase lock loop ( pll ) and frequency extended kalman filter ( fekf ) are deduced
高動態下面臨著多普勒頻率、多普勒頻率變化率較大的問題，給載波跟蹤帶來了很大困難。本章分析了目前高動態接收機中普遍採用的幾種載波跟蹤演算法，對演算法的性能進行了比較。 -
In recent years, with the development of the ds - ss and the theory of all digital receiver, the open - loop structure based forward estimation attracts more attentions
正是由於閉環結構的這些缺點，近年來，隨著擴頻通信和全數字接收機理論的發展，基於前向估計同步參數的開環結構越來越受到人們的重視。 -
Finally, the paper gives out a scheme of digitized carrier synchronization loop for software defined radio receiver which is based on the hardware platform composed of fpga and dsp
最後給出了一種用fpga與dsp組成的硬體平臺實現軟體無線電接收機載波同步環路的方案。
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