message control task 中文意思是什麼

message control task 解釋
信息控制任務
  • message : n 1 通信;口信;問候;祝詞;訊,消息,情報,電報,通報;【物理學】信息;【生物學】遺傳密碼單位〈...
  • control : n 1 支配,管理,管制,統制,控制;監督。2 抑制(力);壓制,節制,拘束;【農業】防治。3 檢查;核...
  • task : n. 1. (派定的)工作,任務,功課。2. 艱苦的工作,苦差使。3. 〈廢語〉租稅,稅款。vt. 1. 派給工作。2. 虐待,使作苦工。3. 〈廢語〉課稅。
  1. Thispaperhasstudiedonthedatalinkinterfacetechniqueoftacticalcontrolsystem. firstof all, functional requirement and the important role of data link interface in tactical controlsystem is introduced ; secondly, with object oriented method, the characteristic of uav taskcontrol process is analysed, and then uav task control information model is established, anddata link interface standard of tactical control system is designed based on this model, including message format and transmission mechanism ; thirdly, data link control module isdesigned based on embedded linux operating system and has realized conversion betweendata link standard interface and the private interface of uav data link ; and then, combinationreal time corba middleware and its event channel, data link control modular componenttechnology is studied, and realization scheme is put forward ; finally, demostration is madebased on prototype of tactical controlsystem, which verify the validaty of data link interfacestandardandembeddeddatalinkcontrolmodules

    本文對戰術控制系統中的數據鏈介面技術進行研究:分析了數據鏈介面在戰術控制系統中的功能需求;採用面向對象的方法,分析無人機任務控制問題,建立了無人機任務控制信息模型,並基於該模型設計了數據鏈介面通信協議,包括報文格式和傳輸機制;基於嵌入式linux系統設計了數據鏈介面控制模塊,實現了數據鏈標準介面與無人機數據鏈私有介面之間的相互轉換;結合實時corba中間件及其事件通道,研究了數據鏈介面控制模塊組件技術,並給出了實現方案;通過戰術控制原理實驗系統的演示實驗,驗證了數據鏈介面通信協議和嵌入式數據鏈介面控制模塊的有效性。
  2. By defining the agent communication ontology language and agent message structure as well as inheriting the capability of autonomy, intelligence and cooperation, this paper implements the method of cooperative process control of distributed multi - task

    通過定義面向領域問題的agent通信原語和agent消息結構,結合agent的智能性、自治性、協作性功能實現分散式節點多任務的協作求解。
  3. The task in the paper comprises two parts. the software design procedure works as follow, program the drivers for module on pc with cvi, generate the corresponding ddl and then edit the test serial and invoke the ddl by designing soft panel with vc + + 6. 0. thus facilitate users to control module to conduct high speed data test. the hardware design procedure works as follow, design vxi message based interface circuit and plesio - fdc circuit with fast data transport function on xc2vp30, a virtex - ii pro series fpga chip designed by xilinx company which integrates power - pc processor

    筆者負責的工作包括軟體設計和硬體設計兩部分:軟體設計是用cvi工具編寫模塊在pc機上的驅動程序,生成動態連接庫,再用visualc + + 6 . 0設計軟面板,實現測試矢量的編輯和動態連接庫的調用,讓用戶很方便地控制模塊進行高速數據測試;硬體設計是在xilinx公司的一片集成了power - pc處理器的virtex - iipro系列fpga晶元xc2vp30上完成vxi總線的消息基介面電路設計和具有快速數據傳送功能的準fdc電路[ 1 ] [ 2 ]設計。
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