on transistor 中文意思是什麼

on transistor 解釋
通導晶體管
  • on : adv 1 〈接觸、覆蓋〉上去;開(opp off)。 turn on the light [radio water gas] 開電燈[收音機、自來...
  • transistor : n. 【無線電】晶體(三極)管;晶體管[半導體]收音機。 a transistor radio 晶體管[半導體]收音機。
  1. On the teaching of triode transistor characteristic curve ' s saturated area

    談對三極體特性曲線飽和區的教學
  2. The course concentrates on circuits using the bipolar junction transistor, but the techniques that are studied can be equally applied to circuits using jfets, mosfets, mesfets, future exotic devices, or even vacuum tubes

    本課程集中講解使用雙極結晶體管的電路,但所學技術同樣適用於使用jfet , mosfet , mesfet ,未來的稀有裝置,甚至真空管的電路。
  3. Based on the analysis of transistor amplifier noise model, we select devices with low noise in reason. and the method how to reduce phase noise and phase jitter is also discussed

    依據晶體管放大器的噪聲模型分析合理選擇了低噪聲的元器件,對降低相位噪聲和相位抖動的方法作了一些探討。
  4. In order to drive the lcd with high resolution and improve the displaying quality, people designed a tft ( thin - film transistor ) on every pixel of lcd to control display pixels independently

    而在高解析度的液晶顯示器中,為了提高顯示畫面的質量。人們在每個顯示像素上設計了一個非線性的有源薄膜晶體管( tft thinfilmtransistor )來對每一個液晶像素進行獨立驅動。
  5. After constructing a 35 - nanometer - high channel between two silica plates and filling it with potassium chloride saltwater, they demonstrated that voltage applied across this nanofluidic transistor could switch potassium ion flow on and off

    他們在兩片硅板之間製作35奈米高的通道,注入氯化鉀溶液,示範在這個奈米流體晶體管上施加的電壓可開啟或阻斷鉀離子流。
  6. In chapter 4, the circuit of the carrier synchronization unit is implemented on fpga, the resistor transistor logic ( rtl ) schemes are presented

    第四章在fpga平臺上實現載波同步單元電路,並給出了實現后的fpga資源消耗、寄存器傳輸邏輯( rtl )原理圖。
  7. Based on many other circuit formats, a new kind of logic - level circuit representation, called unified middle - level circuit format ( umcf ), is defined in this paper, in which some special operations on circuit related with power estimation and low power design. umcf can not only interchange circuits of different formats, but also convert circuits to hspice acceptable files, which can be used for transistor level power estimation

    本文結合多種不同的電路格式,自主定義了一種邏輯級電路的中間表示形式(稱為umcf )和一系列極具特色的與低功耗技術相關的操作,它不但可以實現與其他多種電路格式之間的相互轉換,還可以將電路直接轉換成hspice可以接受的文件,進行晶體管級的電路功耗估計,這樣可以在公認的高精度的功耗模擬器上,對本文的結果進行有效的驗證。
  8. In the synchronous " model, based on the idea of polygonal flux linkage locus, by means of constructing the switch state period table of three phrase voltage inverter is required. in the brushless model, the igbt ( isolated gate bipolar transistor ) switch state period table is gained by gal ( generic array logic ) which analyzes the signal of position feed - back

    在同步方式下,基於多邊形磁鏈軌跡法的思想,用作圖法求得三相電壓型逆變器的pwm波形序列;在無刷直流方式下,用gal對位置反饋信號進行邏輯綜合,得到開關管的導通規律。
  9. A particular frog's calls were recorded on one channel, using a transistor-condenser microphone.

    青蛙的叫聲用晶體管傳聲器記錄在一個頻道上。
  10. Thirdly, the paper researchs the application of single electron transistor and the synthesis theory of cicuit based on quantum dot cellular automata by synthesis example of quantum cellular neural network based on build schr ? dinger equation of coupling quantum dot. at last, the paper researchs digital integrated circuit design based on quantum dot cellular automata and design a 8 - bit quantum dot cellular adder by qcadsign based on a method of majority logic reducetion for quantum cellular automata, it prove this designer of 8 - bit quantum dot cellular adder is correctly

    Dinger )方程為基礎的量子點細胞自動機電路綜合理論,本文以量子細胞神經網路為綜合實例,建立耦合量子點的薛定鄂( schr ? dinger )方程組,通過化簡得到類似細胞神經網路的非線性電路方程。最後研究了基於量子點細胞自動機數字集成電路設計,通過建立邏輯方程,簡化邏輯方程,並設計基於精簡qca擇多邏輯門8位加法器,並用qcadesign進行了模擬,實驗證明設計正確性。
  11. Thermodynamic entropy, in contrast, depends on the states of all the billions of atoms ( and their roaming electrons ) that make up each transistor

    與此相對照,熱力學熵的大小取決于數十億個構成電晶體的原子(及其漫遊電子)的狀態。
  12. In the paper, an automatic macro - cell routing system, which bases on the architecture of three levels : chip, macro - cell and transistor group, is discussed

    本文基於晶元、宏單元、晶體管群三級的層次化架構,實現了一個宏單元自動布線系統。
  13. After introduction of the tranlinear loop principal, the bjt current controlled conveyor has been designed by using mixed tranlinear loop voltage follower. as for modern integrated circuit, the model of mos transistor, the active resistance and the current mirror integrated circuit formed by mos transistor are introduced. the cmos current controlled conveyor has been derived from mixed tranlinear loop cmos voltage follower based on weak inversion operation

    針對現代集成電路的工藝,本文對mos晶體管的工作原理進行了簡要的敘述,討論了有源電阻和電流鏡的實現方法,並利用mos晶體管的亞閾值特性組成混合跨導線性迴路完成對應的電壓跟隨器的設計,推導出了基於cmos技術的電流控制傳送器。
  14. The paper are investigating several alternatives for example quantum dot cellular automata and single electron transistor to substitute conventional field effect transistors ( fet ’ s ) for ultra large scale integrated circuit ; and i take research on the modeling of single electron transistor and single electron cicuit

    基於以上考慮,本文研究一些新的基於量子力學原理的器件如量子點細胞自動機( qca ) 、單電子晶體管( set )取代以fet器件為基礎超大規模集成電路,主要在單電子晶體管建模和單電子電路綜合做了一些研究工作。
  15. First, the paper researchs the spice simulation of single electron transistor based on curve approach and quasi - analytical model of single electron transisor, and simulate characteristic of single electon transistor with matlab tool. secondly, the paper combine spice simulation program with master equation of single electron transistor, put forward novel spice simulation method of single electron transistor based on master equation, by choose master state of single electron transistor and build master equation of single electron transistor, afterward gain nonlinear cortrolled source of spice model of single electron transistor by solve the master equation of single electron transistor and simulate v - i characteristic of single electon transistor by spice program, it ’ s result prove the method is availability precision comparing with master equation method

    然後在此基礎上提出了基於主方程法單電子晶體管spice模擬新方法,本論文結合當前電路模擬軟體spice程序和單電子晶體管主方程模擬演算法,通過選擇單電子島電子數的主要狀態,建立單電子晶體管主方程,然後求解主方程,求得單電子晶體管spice等效模型的受控源的非線性函數,然後利用集成電路輔助分析軟體spice的abm (模擬行為建模)建立單電子晶體管( set ) spice等效模型,利用set的等效模型對單電子晶體管v - i特性進行模擬,實驗證明此方法與直接解主方程法相比具有一定的精度。
  16. This paper demonstrates how to generate variable pwm waveform based on standard cpld device, the proposed circuit is incorporated with mcu to provide simple and effective solution for high - performance pwm converters. in the brushless model, the igbt ( isolated gate bipolar transistor ) switch state period table is gained by mc33035 which analyzes the signal of position feed - back

    這部分功能在cpld器件中用vhdl語言開發實現,其isp (在系統編程)方式使得設計與維護都比傳統方法方便靈活,由於逆變器開關元件的觸發信號是由硬體來產生的,因此更容易實現準確的高速實時控制。
  17. What is an active protection, elementary : mike or receiver of the signal - an amplifier, 1 transistor - a capacitor with changeable resistor - an output on speaker or emitter

    頻率范圍超過100千兆赫,採用材料反射體屏蔽,具有高介電常數,導磁性,水或鎂7分水作為遮蓋金字塔,填充物- - -一個吸收器- - -石墨,碳。也可以建造積極保護方式電容器。
  18. In the transistor, the output current depends on the input current, hence it is a current - operated device

    在晶體管中,輸出電流依賴于輸入的電流,因此它是一個電流控制器件。
  19. The device structure and physical models of 4h - sic mosfet and mesfet are built and the properties are simulated with the use of medici software. the influence of the temperature and structure parameter on the device ' s properties is summarized indicates that no negative resistance exists in breakdown property and the breakdown voltage is up to 85v and 209v separately. the maximum power density of 4h - sic mesfet is as high as 19. 22w / mm. at the same time, the processes of sic field - effect transistor is studied and the fabrication processes suitable to sic mosfet are developed.

    論文分析建立了4h - sicmosfet和mesfet器件的結構模型和物理模型,採用二維器件模擬軟體medici對4h - sicmosfet和mesfet的輸出特性進行了模擬分析,研究了溫度和結構參數對器件特性的影響,表明兩種器件的擊穿特性均沒有負阻現象,擊穿電壓分別達到85v和209v ,由此得到4h - sicmesfet最大功率密度可達到19 . 22w mm ;同時,研究了sic場效應晶體管的製作工藝,初步得到了一套製造sicmosfet器件的製造工藝流程,研製出了4h - sicmosfet器件。
  20. Based on this, infrared detector and field effect transistor were fabricated and the properties were also tested

    並在此基礎上,制備得到了碳納米管基的紅外探測器和場效應晶體管。
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