paper decoder 中文意思是什麼

paper decoder 解釋
紙袋譯碼器
  • paper : n 1 紙;裱墻紙。2 報紙,報。3 收據;債券;證券;票據;匯票;鈔票(=paper money)。4 〈pl 〉身份...
  • decoder : n. 譯電員;譯碼機;解碼器;判讀器。
  1. On the basis of the study on the speech coder algorithms, paper describe an advanced method of developing dsp system software, and as the guidlines, we developed the programme of whole decoder unit. paper stress on analysis of the ecu in decoder unit. aiming at amr algorithms disadvantage of angularity of synthetical speech, paper study on the specutral extrapolation which apply to extrapolate reflect coefficient of track model to make error conceal processing of amr. at last paper analyze existing echo cancellation algorithms using on mobile communication system

    在此基礎上,描述了一種較為先進的大型dsp系統程序開發策略,並以此為指導思想,以美國ti公司c6000dsp開發平臺開發出了整個amr解碼器單元的系統程序。論文對amr解碼器的誤碼隱藏處理單元進行了重點分析,針對原有演算法合成語音自然度不好的缺點,論文研究了將譜外推法應用到amr演算法中外推出聲道模型反射系數參數進行誤碼消除處理。
  2. The paper is to design analogue lowpass filtering circuits with high performances. the circuits are used directly as anti - alias filters in an analogue front - end of video decoder ic ( integrated circuit )

    =本文旨在設計高性能的模擬低通濾波電路,用作視頻解碼晶元模擬前端中的抗混疊濾波器。
  3. The field of video signal processing is now undergoing a digital reform. the digital processing technique is clearly expatiated in this paper, such as a / d convert, anti - alias filter, clamp control, gain control, pll, synchronization circuit, color decoder, comb filters

    本文詳細敘述了視頻圖像的數字處理方法,重點介紹了視頻信號數字化技術、抗混疊濾波器、箝位、增益控制、鎖相技術、同步時鐘產生、電視信號亮色分離、彩色解碼等技術,這些關鍵技術為視頻信號的數字化處理提供了重要的基礎。
  4. If we splice it simply by " cut and copy ", the status flag may be lost, so the decoder cannot decode and display the bitstream correctly. this paper disscuss all the problem about mpeg - 2 bitstream splicing

    如果通過簡單的拷貝、粘貼來完成mpeg - 2碼流的拼接工作就會使拼接點前後數據的相關性或狀態信息丟失而造成拼接后碼流不能正確解碼。
  5. So, this paper does some research on subjective vision quality and proposes a hybrid video encoder and decoder based on texture analysis and synthesis

    為此,本文對視頻圖像中的主觀視覺質量進行了研究,提出了基於紋理分析與合成的視頻編碼器和解碼器。
  6. In this paper, a new architecture of hardware decoder based on the modified euclidean algorithm ( mea ) is provided, and it is called the fprme ( fully - pipelined recursive modified euclidean ) decoder

    本文基於修正的歐幾里德演算法( mea )設計了一種新的硬體解碼器實現結構,稱其為fprme ( fully - pipelinedrecursivemodifiedeuclidean )解碼器。
  7. In this paper, the common used encoding algorithms and basic finite - field opera - tions algorithms are introduced, and the decoding algorithms such as inverse - free ber - lekamp - massey ( ibm ) algorithm, reformulated inverse - free berlekamp - massey ( ribm ) algorithm and modified euclidean algorithm are analyzed in great detail. based on the ribm algorithm, a modified structure and a pipelined decoder scheme are presented. a tradeoff has been made between the hardware complexities and decoding latency, thus this scheme gains significant improvement in hardware complexity and maximum fre - quency

    本文簡要介紹了有限域基本運算的演算法和常用的rs編碼演算法,詳細分析了改進后的euclid演算法和改進后的bm演算法,針對改進后的bm演算法提出了一種流水線結構的譯碼器實現方案並改進了該演算法的實現結構,在譯碼器復雜度和譯碼延時上作了折衷,降低了譯碼器的復雜度並提高了譯碼器的最高工作頻率。
  8. Abstract : the paper presents the method with the encoder and decoder instructions, with the switch of bcd in possession of six input points to realize the externally setting up in the device parameter in plc of multibit data

    文摘:本文提出應用數據編碼指令和數據譯碼指令,用一位bcd碼開關,佔用六個輸入點,實現多位數的plc器件參數的外部設定方法。
  9. The circuitry of outer coder consists of data formation, data randomizer, rs encoder, and interleaver in the transmitter and their counterparts in receiver : data reverse transformer, de - randomizer, rs decoder and de - interleaver. in this paper, the first chapter gives an overview of hdtv, then focus on the dvb - c system, and then talks about the technology involved in asic

    本文第一章首先概述了數字高清晰度電視,接著重點介紹了dvb - c有線電視傳輸系統,並對專用集成電路( asic )設計的發展、設計流程和注意事項及將來的設計趨勢? soc的設計技術作了概述。
  10. The main purpose of this paper is to research and implement of the channel decoder ’ s hardware of sdtv set top box

    本課題是基於st公司的標準清晰度數字電視通道解碼器方案而實現的,採用了該公司的全數字單片qam解調器stv0297 。
  11. This paper is mainly considered : 1 ) how joint coded modulation transmitter is designed based on the iterative decoder. 2 ) the combination of ldpc code with bit - interleaved coded modulaton. 3 ) the optimization of two dimensional signal constellations in joint coded modulation with iterative decoder

    本文研究工作的重點在於: 1 )迭代譯碼對聯合編碼調制方案設計的影響; 2 )新的糾錯編碼和比特交織編碼調制的有機結合; 3 )高階星座的最優化問題。
  12. The implementation of crc - rs decoder in the project asks for an adoption of rs and extended shortened crc codes. although extended shortened crc codes have been used e xtensively i n c ommunication sy stems, t he r elative d ocuments o n t he c odes a re little. thus, on the basis of the common crc codes, the paper brings forward a concept of extended shortened crc codes

    本論文內容來源於某通信設備研製項目,該項目中的「 crc - rs譯碼器的設計」要求採用rs和擴展縮短crc碼來實現。對于擴展縮短crc碼使用多,但有關的研究文獻很少。由此,論文在原有crc碼的基礎上提出了擴展縮短碼的新概念。
  13. They are vref, iref, current matrix, switch matrix, latch and decoder. vref, current matrix, switch matrix and decoder are the key parts in dac design. the errors caused by them are analyzed and suppressed in the paper

    其中,基準電壓電路,電流源陣列、開關陣列和譯碼電路是整個設計的重點和難點,它們設計的好壞直接影響著dac電路特性的優劣。
  14. This is the core of the issue. in this section we designed the cells of the dac, including the decoder circuit, bandgap reference voltage circuit, current source circuit and switched circuit etc. the fourth chapter the simulations of circuit and errors of the dac are discussedi, so the simulation waveforms are plotted on the paper and we must take the error corrections and minimize ways

    對于整個d a轉換器的具體結構和電路設計放在第三章,這也是本文的核心之處,對d a轉換器的整體電路及主要電路單元如:數字譯碼電路、帶隙參考電壓源電路、電流源產生電路、差分電流開關電路等進行詳細地分析和設計。
  15. The viterbi decoder with hard decision designed by the paper, is aimed at ( 3, 1, 9 ) convolutional coding. the data rate is 9. 6kbps. the data rate received by the rake receiver is spreaded by 127 - bit spread sequences, added pilot signals and modulated by qpsk

    該課題所設計viterbi譯碼是針對( 3 , 1 , 9 )卷積碼的硬判決譯碼,數據速率為9 . 6kbps ; rake接收機所接收的數據是擴頻因子為127 、加入導頻且經qpsk調制的擴頻信號,使用verilg硬體描述語言在xilinx公司的ise環境下在用現場可編程門陣列( fpga )來實現viterbi譯碼器和rake接=收機的功能。
  16. This paper research the mpeg - 4 standard first and realize the encoder and decoder of video of mpeg - 4. then the paper emphasize two key techniques in mpeg - 4 encoder : motion estimation and sprite encode. motion estimation takes the largest time in all parts of mpeg - 4 encoder. the paper concluded some typical me techniques, research and realize the mvfast arithmetic whice is recommend by iso, then improved mvfast by considering the temporal candidate motion vector and adjustal thresholds

    然後,本論文重點研究了mpeg - 4編碼過程中兩項關鍵技術:運動估計和背景圖像編碼。運動估計是編碼過程中最重要,耗時最長的部分。本論文總結了常見的運動估計演算法,深入研究並實現了iso推薦的運動估計優化演算法mvfast ,在此基礎上,引入了時間參考運動向量和可調的門限參考值,對mvfast演算法進行了改進。
  17. The main function modules discussed in this paper include : stream media protocols application model and realization, ts parsing module, audio / video decoder, audio / video synchronization model and realization, player memory buffer management module, multi _ task tech under uclinux. we also discuss the difference of the realization of stream media player between two defferent service types : broadcast tv ( btv ) and video - on - demand ( vod )

    從功能上,流媒體播放器主要包含幾個大的功能模塊:流媒體協議棧的應用模型及實現機制、多節目復用傳輸流( ts )的解析實現、音視頻媒體數據的解碼、音視頻同步機制的設計和實現方法、播放器內存管理模型的設計和實現、 uclinux下多任務的實時調度和高效數據交互技術等。
  18. This paper discussed the theory of encoding and decoding of turbo codes, researched some key techniques in encoder and decoder, analyzed the question of selection of the component codes and generation polynomial in encoder

    本文討論了turbo碼的編譯碼原理,研究在其編譯碼器中的關鍵技術,重點探討了在編碼器中成員碼以及生成多項式的選擇問題。
  19. The whole paper had been divided into four parts : the first part introduces the general situation of digital trunking system and its channel encoding, the recent development of viterbi decoding ; the second part studies the error control scheme, and the convolution decoding depth which is most fit to digital trunking system ; the third part introduces several low power viterbi decoder and its principle ; the last part proposes a united - decision estimating viterbi decoding algorithm

    本文共分為四部分,第一部分介紹了數字集群及其通道編碼的總體情況, viterbi譯碼的發展現狀。第二部分給出了數字集群系統中話音通道差錯控制總體方案,並研究了適合數字集群系統的卷積碼的解碼深度。第三部分簡單介紹了各種低功率viterbi譯碼器及原理。
  20. I n th i s paper, we analyze error infect i on to picture and give a practicable method in errro dection. some new error concealment algorithms are also presented. this algorithms are applied in dvd decoder system based on ms dshow and intel mmx technology

    本文分析了錯誤比特出現在mpge視頻流中的不同的位置對畫面質量的影響,給出了切實可行的錯誤檢測的方法,並結合dvd解碼器開發的實踐,提出了幾種有效的錯誤掩蔽演算法。
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