parallel fault simulation 中文意思是什麼

parallel fault simulation 解釋
并行故障模擬
  • parallel : adj 1 平行的;并行的 (to; with); 【電學】並聯的。2 同一方向的,同一目的的。3 相同的,同樣的,相...
  • fault : n 1 過失,過錯;罪過,責任。2 缺點,缺陷,瑕疵。3 (獵狗的)失去嗅跡。4 【電學】故障,誤差;漏電...
  • simulation : n. 假裝;模擬;裝病,裝瘋;【生物學】擬態,擬色。
  1. Through the simulation of large - scale circuit simulation proved that use the crossover tearing technology could detailed network structure, simplify the diagnostic process, and the neural network can parallel deal with the diagnosis information, and the logic operation can judge the information of the multi - fault. the illustrative simulation shows that it can increase the diagnosis speed and decrease the workload before test

    通過對大規模模擬電路的模擬證明,使用交叉撕裂明細網路結構,簡化診斷過程,且運用神經網路組對信息進行并行處理,邏輯分析運算對多故障信息進行處理判斷,大大提高了故障診斷速度,減小了測前工作量。
  2. Its innovation is to extend existed fanout - free region pwtitioning methods of combinational circuits to synchionous sequentia1 circuits, and combines fanout source fault simulation and critical path tracing. experimental resu1ts reveal that the efficiency of it is better than that of generic word - level fault parallel fs algorithms

    該演算法的創新在於擴充了現有的組合電路無扇出區劃分方法,使之對時序電路適用,並把它與扇出源故障并行模擬和臨界路徑追蹤方法相結合。
  3. Fault simulation contains : parallel fault simulation and deductive fault simulation

    故障模擬方法包括:并行故障模擬和演繹故障模擬。
  4. We first propose and implement a sequential word - level pattern parallel fs algorithrn for synchionous sequential circuits. differing from other similar algorithins, it utilizes the relative independence of every fault test sequence generated by the g - f two - value tg algorithm, pwtitions and dynamically mounts test pattem, avoids redundant simulation for added synchlronous sequence, and gets better results

    首先提出並實現了一個新的同步時序電路單機字級測試碼并行fs演算法,該演算法與現有同類方法的不同在於,利用確定性g - f二值tg演算法的每個故障測試序列之間的相對獨立性,對測試碼進行分解並動態組裝,避免了對添加的同步序列的冗餘模擬,效果較好。
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